Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond. - Balaji Jayaraman; Sneha Gupta; Yanli Zhang; Puneet Goyal; Herbert Ho; Rishikesh Krishnan; Sunfei Fang; Sungjae Lee; Douglas Daley; Kevin McStay; Bernhard Wunder; John Barth 001; et al. (ICICDT, 2012)

A 14 nm 1.1 Mb Embedded DRAM Macro With 1 ns Access. - Gregory Fredeman; Donald W. Plass; Abraham Mathews; Janakiraman Viraraghavan; Kenneth Reyer; Thomas J. Knips; Thomas Miller; Elizabeth L. Gerhard; Dinesh Kannambadi; Chris Paone; Dongho Lee; Daniel Rainey 002; et al. (IEEE J. Solid State Circuits, 2016)