A 256-Mb multilevel flash memory with 2-MB/s program rate for mass storage applications. - Atsushi Nozoe; Hiroaki Kotani; Tetsuya Tsujikawa; Keiichi Yoshida; Kazunori Furusawa; Masataka Kato; Toshiaki Nishimoto; Hitoshi Kume; Hideaki Kurata; Naoki Miyamoto; Shoji Kubono; Michitaro Kanamitsu; et al. (IEEE J. Solid State Circuits, 1999)

Intelligent Interface and Control of an Exoskeletal Robot for Human Shoulder Motion Support Considering Subject's Arm Posture. - Kazuo Kiguchi; Koya Iwami; Makoto Yasuda; Hideaki Kurata; Keigo Watanabe; Toshio Fukuda (ICRA, 2002)

Constant-charge-injection programming: a novel high-speed programming method for multilevel flash memories. - Hideaki Kurata; Shunichi Saeki; Takashi Kobayashi 002; Yoshitaka Sasago; Tsuyoshi Arigane; Kazuo Otsuga; Takayuki Kawahara (IEEE J. Solid State Circuits, 2005)

A 130-nm CMOS 95-mm2 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput. - Hideaki Kurata; Shunichi Saeki; Takashi Kobayashi 002; Yoshitaka Sasago; Tsuyoshi Arigane; Keiichi Yoshida; Yoshinori Takase; Takayuki Yoshitake; Osamu Tsuchiya; Yoshinori Ikeda; Shunichi Narumi; Michitaro Kanamitsu; et al. (IEICE Trans. Electron., 2006)

A 126 mm2 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology. - Hideaki Kurata; Satoshi Noda; Yoshitaka Sasago; Kazuo Otsuga; Tsuyoshi Arigane; Tetsufumi Kawamura; Takashi Kobayashi 002; Hitoshi Kume; Kazuki Homma; Teruhiko Ito; Yoshinori Sakamoto; Masahiro Shimizu; et al. (IEICE Trans. Electron., 2007)

Selective-Capacitance Constant-Charge-Injection Programming Scheme for High-Speed Multilevel AG-AND Flash Memories. - Kazuo Otsuga; Hideaki Kurata; Satoshi Noda; Yoshitaka Sasago; Tsuyoshi Arigane; Tetsufumi Kawamura; Takashi Kobayashi 002 (IEICE Trans. Electron., 2007)

Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node. - Hideaki Kurata; Kazuo Otsuga; Akira Kotabe; Shinya Kajiyama; Taro Osabe; Yoshitaka Sasago; Shunichi Narumi; Kenji Tokami; Shiro Kamohara; Osamu Tsuchiya (IEEE J. Solid State Circuits, 2007)

A Design of Constant-Charge-Injection Programming Scheme for AG-AND Flash Memories Using Array-Level Analytical Model. - Shinya Kajiyama; Ken'ichiro Sonoda; Kazuo Otsuga; Hideaki Kurata; Kiyoshi Ishikawa (IEICE Trans. Electron., 2008)

Memory at VLSI Circuits Symposium. - Kiyoo Itoh 001; Hideaki Kurata; Kenichi Osada; Tomonori Sekiguchi (IEEE J. Solid State Circuits, 2008)