A 100-Gb-Ethernet subsystem for next-generation metro-area network. - Hidehiro Toyoda; Shinji Nishimura; Michitaka Okuno; Ryouji Yamaoka; Hiroaki Nishi (ICC, 2005)

100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet. - Hidehiro Toyoda; Shinji Nishimura; Michitaka Okuno; Kouji Fukuda; Kouji Nakahara; Hiroaki Nishi (IEICE Trans. Commun., 2006)

A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications. - Hidehiro Toyoda; Shinji Nishimura; Michitaka Okuno; Matsuaki Terada (IEICE Trans. Electron., 2007)

A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet. - Hidehiro Toyoda; Michitaka Okuno; Shinji Nishimura; Matsuaki Terada (ICC, 2008)

100GbE PHY and MAC layer implementations. - Hidehiro Toyoda; Goichi Ono; Shinji Nishimura (IEEE Commun. Mag., 2010)

A 400-Gb/s and Low-Power Physical-Layer Architecture for Next-Generation Ethernet. - Masashi Kono; Akihiro Kambe; Hidehiro Toyoda (ICC, 2011)

10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link. - Goichi Ono; Keiki Watanabe; Takashi Muto; Hiroki Yamashita; Koji Fukuda; Noboru Masuda; Ryo Nemoto; Eiichi Suzuki; Takashi Takemoto; Fumio Yuki; Masayoshi Yagyu; Hidehiro Toyoda; et al. (ISSCC, 2011)

A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link. - Goichi Ono; Keiki Watanabe; Takashi Muto; Hiroki Yamashita; Koji Fukuda; Noboru Masuda; Ryo Nemoto; Eiichi Suzuki; Takashi Takemoto; Fumio Yuki; Masayoshi Yagyu; Hidehiro Toyoda; et al. (IEEE J. Solid State Circuits, 2011)

A 25-Gb/s 2.2-W optical transceiver using an analog FE tolerant to power supply noise and redundant data format conversion in 65-nm CMOS. - Takashi Takemoto; Hiroki Yamashita; Takehito Kamimura; Fumio Yuki; Noboru Masuda; Hidehiro Toyoda; Norio Chujo; Kenji Kogo; Yong Lee; Shinji Tsuji; Shinji Nishimura (VLSIC, 2012)

A Novel 400-Gb/s (100-Gb/s×4) Physical-Layer Architecture Using Low-Power Technology. - Masashi Kono; Akihiro Kambe; Hidehiro Toyoda; Shinji Nishimura (IEICE Trans. Commun., 2012)

Wavelength switching method combined with downstream queue monitoring per ONU for λ-tunable WDM/TDM-PON. - Jun Sugawa; Toshiyuki Odaka; Hidehiro Toyoda (ECOC, 2014)

A 25-Gb/s 2.2-W 65-nm CMOS Optical Transceiver Using a Power-Supply-Variation-Tolerant Analog Front End and Data-Format Conversion. - Takashi Takemoto; Hiroki Yamashita; Fumio Yuki; Noboru Masuda; Hidehiro Toyoda; Norio Chujo; Yong Lee; Shinji Tsuji; Shinji Nishimura (IEEE J. Solid State Circuits, 2014)

Adaptive FEC control in downstream collaborating with traffic control in OLT for WDM/TDM-PON. - Jun Sugawa; Koji Wakayama; Hidehiro Toyoda (ECOC, 2015)

Simultaneous multi-ONU wavelength switching method for coexistence of different λ-tuning times in WDM/TDM-PON. - Jun Sugawa; Koji Wakayama; Hidehiro Toyoda (OFC, 2015)