Development of ultra-thinning technology for logic and memory heterogeneous stack applications. - Nobuhide Maeda; Young-Suk Kim; Y. Hikosaka; T. Eshita; Hideki Kitada; K. Fujimoto; Yoriko Mizushima; K. Suzuki; Tadao Nakamura; Akihito Kawai; Kazuhisa Arai; Takayuki Ohba (3DIC, 2011)

Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects. - Tomoji Nakamura; Hideki Kitada; Yoriko Mizushima; Nobuhide Maeda; Koji Fujimoto; Takayuki Ohba (3DIC, 2011)

Characterization of local strain around trough silicon via interconnects in wafer-on-wafer structures. - Osamu Nakatsuka; Hideki Kitada; Young-Suk Kim; Yoriko Mizushima; Tomoji Nakamura; Takayuki Ohba; Shigeaki Zaima (3DIC, 2011)

Influence of wafer thinning process on backside damage in 3D integration. - Tadao Nakamura; Yoriko Mizushima; Hideki Kitada; Young-Suk Kim; Nobuhide Maeda; Shoichi Kodama; Ryuichi Sugie; Hiroshi Hashimoto; Akihito Kawai; Kazuhisa Arai; Akira Uedono; Takayuki Ohba (3DIC, 2013)

Study of MOSFET thermal stability with TSV in operation temperature using novel 3D-LSI stress analysis. - Hideki Kitada; Hiroko Tashiro; Shoichi Miyahara; Takeshi Ishitsuka; Aki Dote; Shinji Tadaki; Tatsumi Nakada; Seiki Sakuyama (3DIC, 2016)