A distributed shared memory multiprocessor ASURA: memory and cache architecture. - Shin-ichiro Mori; Hideki Saito 001; Masahiro Goshima; Mamoru Yanagihara; Takashi Tanaka; David Fraser; Kazuki Joe; Hiroyuki Nitta; Shinji Tomita (SC, 1993)

The Data Partitioning Graph: Extending Data and Control Dependencies for Data Partitioning. - Tsuneo Nakanishi; Kazuki Joe; Akira Fukuda; Keijiro Araki; Hideki Saito 001; Constantine D. Polychronopoulos (LCPC, 1994)

The CDP2 Partitioning Algorithm a Combined End Program Partitioning Algorithm on the Data Partitioning Graph. - Tsuneo Nakanishi; Kazuki Joe; Hideki Saito 001; Akira Fukuda; Keijiro Araki (ICPP (2), 1995)

sigma-SSA and Its Construction Through Symbolic Interpretation. - Hideki Saito 001; Constantine D. Polychronopoulos (LCPC, 1996)

The Design of the PROMIS Compiler. - Hideki Saito 001; Nicholas Stavrakos; Steven Carroll; Constantine D. Polychronopoulos; Alexandru Nicolau (CC, 1999)

Multithreading Runtime Support for Loop and Functional Parallelism. - Hideki Saito 001; Nicholas Stavrakos; Constantine D. Polychronopoulos (ISHPC, 1999)

Symbolic Analysis in the PROMIS Compiler. - Nicholas Stavrakos; Steven Carroll; Hideki Saito 001; Constantine D. Polychronopoulos; Alexandru Nicolau (LCPC, 1999)

The Design of the PROMIS Compiler-Towards Multi-Level Parallelization. - Hideki Saito 001; Nicholas Stavrakos; Constantine D. Polychronopoulos; Alexandru Nicolau (Int. J. Parallel Program., 2000)

SPEC HPC2002: The Next High-Performance Computer Benchmark. - Rudolf Eigenmann; Greg Gaertner; Wesley B. Jones; Hideki Saito 001; Brian Whitney (ISHPC, 2002)

Large System Performance of SPEC OMP2001 Benchmarks. - Hideki Saito 001; Greg Gaertner; Wesley B. Jones; Rudolf Eigenmann; Hidetoshi Iwashita; Ron Lieberman; G. Matthijs van Waveren; Brian Whitney (ISHPC, 2002)

Large System Performance of SPEC OMP Benchmark Suites. - Hideki Saito 001; Greg Gaertner; Wesley B. Jones; Rudolf Eigenmann; Hidetoshi Iwashita; Ron Lieberman; G. Matthijs van Waveren; Brian Whitney (Int. J. Parallel Program., 2003)

Impact of Compiler-based Data-Prefetching Techniques on SPEC OMP Application Performance. - Xinmin Tian; Rakesh Krishnaiyer; Hideki Saito 001; Milind Girkar; Wei Li 015 (IPDPS, 2005)

Practical Compiler Techniques on Efficient Multithreaded Code Generation for OpenMP Programs. - Xinmin Tian; Milind Girkar; Aart J. C. Bik; Hideki Saito 001 (Comput. J., 2005)

Challenges in exploitation of loop parallelism in embedded applications. - Arun Kejariwal; Alexander V. Veidenbaum; Alexandru Nicolau; Milind Girkar; Xinmin Tian; Hideki Saito 001 (CODES+ISSS, 2006)

Probablistic Self-Scheduling. - Milind Girkar; Arun Kejariwal; Xinmin Tian; Hideki Saito 001; Alexandru Nicolau; Alexander V. Veidenbaum; Constantine D. Polychronopoulos (Euro-Par, 2006)

Lightweight lock-free synchronization methods for multithreading. - Arun Kejariwal; Hideki Saito 001; Xinmin Tian; Milind Girkar; Wei Li 015; Utpal Banerjee; Alexandru Nicolau; Constantine D. Polychronopoulos (ICS, 2006)

On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. - Arun Kejariwal; Xinmin Tian; Wei Li 015; Milind Girkar; Sergey Kozhukhov; Hideki Saito 001; Utpal Banerjee; Alexandru Nicolau; Alexander V. Veidenbaum; Constantine D. Polychronopoulos (ICS, 2006)

A general approach for partitioning N-dimensional parallel nested loops with conditionals. - Arun Kejariwal; Alexandru Nicolau; Hideki Saito 001; Xinmin Tian; Milind Girkar; Utpal Banerjee; Constantine D. Polychronopoulos (SPAA, 2006)

Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor. - Arun Kejariwal; Alexander V. Veidenbaum; Alexandru Nicolau; Xinmin Tian; Milind Girkar; Hideki Saito 001; Utpal Banerjee (ICSAMOS, 2008)

On the exploitation of loop-level parallelism in embedded applications. - Arun Kejariwal; Alexander V. Veidenbaum; Alexandru Nicolau; Milind Girkar; Xinmin Tian; Hideki Saito 001 (ACM Trans. Embed. Comput. Syst., 2009)

Exploitation of nested thread-level speculative parallelism on multi-core systems. - Arun Kejariwal; Milind Girkar; Xinmin Tian; Hideki Saito 001; Alexandru Nicolau; Alexander V. Veidenbaum; Utpal Banerjee; Constantine D. Polychronopoulos (Conf. Computing Frontiers, 2010)

On the efficacy of call graph-level thread-level speculation. - Arun Kejariwal; Milind Girkar; Xinmin Tian; Hideki Saito 001; Alexandru Nicolau; Alexander V. Veidenbaum; Utpal Banerjee; Constantine D. Polychronopoulos (WOSP/SIPEW, 2010)

SPEC MPI2007 - an application benchmark suite for parallel systems using MPI. - Matthias S. Müller; G. Matthijs van Waveren; Ron Lieberman; Brian Whitney; Hideki Saito 001; Kalyan Kumaran; John Baron; William C. Brantley; Chris Parrott; Tom Elken; Huiyu Feng; Carl Ponder (Concurr. Comput. Pract. Exp., 2010)

Compiling C/C++ SIMD Extensions for Function and Loop Vectorizaion on Multicore-SIMD Processors. - Xinmin Tian; Hideki Saito 001; Milind Girkar; Serguei Preis; Sergey Kozhukhov; Aleksei G. Cherkasov; Clark Nelson; Nikolay Panchenko; Robert Geva (IPDPS Workshops, 2012)

Extending OpenMP* with Vector Constructs for Modern Multicore SIMD Architectures. - Michael Klemm; Alejandro Duran; Xinmin Tian; Hideki Saito 001; Diego Caballero; Xavier Martorell (IWOMP, 2012)

Compiler-Based Data Prefetching and Streaming Non-temporal Store Generation for the Intel(R) Xeon Phi(TM) Coprocessor. - Rakesh Krishnaiyer; Emre Kultursay; Pankaj Chawla; Serguei Preis; Anatoly Zvezdin; Hideki Saito 001 (IPDPS Workshops, 2013)

Practical SIMD Vectorization Techniques for Intel® Xeon Phi Coprocessors. - Xinmin Tian; Hideki Saito 001; Serguei Preis; Eric N. Garcia; Sergey Kozhukhov; Matt Masten; Aleksei G. Cherkasov; Nikolay Panchenko (IPDPS Workshops, 2013)

Can traditional programming bridge the ninja performance gap for parallel computing applications? - Nadathur Satish; Changkyu Kim; Jatin Chhugani; Hideki Saito 001; Rakesh Krishnaiyer; Mikhail Smelyanskiy; Milind Girkar; Pradeep Dubey (Commun. ACM, 2015)

Effective SIMD Vectorization for Intel Xeon Phi Coprocessors. - Xinmin Tian; Hideki Saito 001; Serguei Preis; Eric N. Garcia; Sergey Kozhukhov; Matt Masten; Aleksei G. Cherkasov; Nikolay Panchenko (Sci. Program., 2015)

Reducing the Functionality Gap Between Auto-Vectorization and Explicit Vectorization - Compress/Expand and Histogram. - Hideki Saito 001; Serge Preis; Nikolay Panchenko; Xinmin Tian (IWOMP, 2016)

LLVM Framework and IR Extensions for Parallelization, SIMD Vectorization and Offloading. - Xinmin Tian; Hideki Saito 001; Ernesto Su; Abhinav Gaba; Matt Masten; Eric N. Garcia; Ayal Zaks (LLVM-HPC@SC, 2016)

LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization. - Xinmin Tian; Hideki Saito 001; Ernesto Su; Jin Lin; Satish Guggilla; Diego Caballero; Matt Masten; Andrew Savonichev; Michael Rice; Elena Demikhovsky; Ayal Zaks; Gil Rapaport; et al. (LLVM-HPC@SC, 2017)

Streamline Ahead-of-Time SYCL CPU Device Implementation through Bypassing SPIR-V. - Wenju He; Yilong Guo; Xinmin Tian; Hideki Saito 001; Wenwan Xing; Feng Zou 002; Chunyang Dai; Maosu Zhao; Haonan Yang (IWOCL, 2023)