Energy Efficiency of Scratch-Pad Memory at 65 nm and Below: An Empirical Study. - Hideki Takase; Hiroyuki Tomiyama; Gang Zeng; Hiroaki Takada (ICESS, 2008)

Energy efficiency of scratch-pad memory in deep submicron domains: an empirical study. - Hideki Takase; Hiroyuki Tomiyama; Gang Zeng; Hiroaki Takada (IEICE Electron. Express, 2008)

History of summer school on embedded system technologies organized by students and young engineers. - Hideki Takase; Takuya Azumi; Ittetsu Taniguchi; Yutaka Matsubara; Hayato Kanai; Shintaro Hosoai; Midori Sugaya (WESE@ESWEEK, 2009)

Partitioning and Allocation of Scratch-Pad Memory in Priority-Based Multi-Task Systems. - Hideki Takase; Hiroyuki Tomiyama; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2009)

Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems. - Lovic Gauthier; Tohru Ishihara; Hideki Takase; Hiroyuki Tomiyama; Hiroaki Takada (CASES, 2010)

Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems. - Hideki Takase; Hiroyuki Tomiyama; Hiroaki Takada (DATE, 2010)

Checkpoint Extraction Using Execution Traces for Intra-task DVFS in Embedded Systems. - Tomohiro Tatematsu; Hideki Takase; Gang Zeng; Hiroyuki Tomiyama; Hiroaki Takada (DELTA, 2011)

An integrated optimization framework for reducing the energy consumption of embedded real-time applications. - Hideki Takase; Gang Zeng; Lovic Gauthier; Hirotaka Kawashima; Noritoshi Atsumi; Tomohiro Tatematsu; Yoshitake Kobayashi; Shunitsu Kohara; Takenori Koshiro; Tohru Ishihara; Hiroyuki Tomiyama; Hiroaki Takada (ISLPED, 2011)

Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems. - Hideki Takase; Hiroyuki Tomiyama; Hiroaki Takada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Efficient Algorithms for Extracting Pareto-optimal Hardware Configurations in DEPS Framework. - Hirotaka Kawashima; Gang Zeng; Hideki Takase; Masato Edahiro; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2012)

A Buffering Method for Parallelized Loop with Non-Uniform Dependencies in High-Level Synthesis. - Akihiro Suda; Hideki Takase; Kazuyoshi Takagi; Naofumi Takagi (ICA3PP (1), 2013)

An Operation Scenario Model for Energy Harvesting Embedded Systems and an Algorithm to Maximize the Operation Quality. - Kazumi Aono; Atsushi Iwata; Hideki Takase; Kazuyoshi Takagi; Naofumi Takagi (HPCC/CSS/ICESS, 2014)

Nested Loop Parallelization Using Polyhedral Optimization in High-Level Synthesis. - Akihiro Suda; Hideki Takase; Kazuyoshi Takagi; Naofumi Takagi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

An Integrated Framework for Energy Optimization of Embedded Real-Time Applications. - Hideki Takase; Gang Zeng; Lovic Gauthier; Hirotaka Kawashima; Noritoshi Atsumi; Tomohiro Tatematsu; Yoshitake Kobayashi; Takenori Koshiro; Tohru Ishihara; Hiroyuki Tomiyama; Hiroaki Takada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

An Allocation Optimization Method for Partially-reliable Scratch-pad Memory in Embedded Systems. - Takuya Hatayama; Hideki Takase; Kazuyoshi Takagi; Naofumi Takagi (IPSJ Trans. Syst. LSI Des. Methodol., 2015)

An evaluation framework of OS-level power managements for the big.LITTLE architecture. - Hideki Takase; Kazumi Aono; Yutaka Matsubara; Kazuyoshi Takagi; Naofumi Takagi (NEWCAS, 2016)

Design concept of a lightweight runtime environment for robot software components onto embedded devices: work-in-progress. - Hideki Takase; Tomoya Mori; Kazuyoshi Takagi; Naofumi Takagi (EMSOFT, 2018)

A Study on Introducing FPGA to ROS Based Autonomous Driving System. - Yasuhiro Nitta; Sou Tamura; Hideki Takase (FPT, 2018)

A concept of a hardware design environment with the functional language elixir: work-in-progress. - Hideki Takase; Kentaro Matsui; Yoshihiro Ueno; Masakazu Mori; Yuki Hisae; Susumu Yamazaki (CODES+ISSS, 2019)

ZytleBot: FPGA Integrated Development Platform for ROS Based Autonomous Mobile Robot. - Yasuhiro Nitta; Sou Tamura; Hideki Takase (FPL, 2019)

mROS: A Lightweight Runtime Environment for Robot Software Components onto Embedded Devices. - Hideki Takase; Tomoya Mori; Kazuyoshi Takagi; Naofumi Takagi (HEART, 2019)

ZytleBot: FPGA Integrated Development Platform for ROS Based Autonomous Mobile Robot. - Yasuhiro Nitta; Sou Tamura; Hidetoshi Yugen; Hideki Takase (FPT, 2019)

An FPGA Accelerator for Bayesian Network Structure Learning with Iterative Use of Processing Elements. - Yasuhiro Nitta; Hideki Takase (FPT, 2020)

mROS: A Lightweight Runtime Environment of ROS 1 nodes for Embedded Devices. - Hideki Takase; Tomoya Mori; Kazuyoshi Takagi; Naofumi Takagi (J. Inf. Process., 2020)

Zytlebot : FPGA integrated ros-based autonomous mobile robot. - Ryota Miyagi; Naofumi Takagi; Sho Kinoshista; Masashi Oda; Hideki Takase (FPT, 2021)

LDoS Attacker Detection Algorithms in Zigbee Network. - Satoshi Okada; Daisuke Miyamoto; Yuji Sekiya; Hideki Takase; Hiroshi Nakamura (iThings/GreenCom/CPSCom/SmartData/Cybermatics, 2021)

Elastic Sample Filter: An FPGA-based Accelerator for Bayesian Network Structure Learning. - Ryota Miyagi; Ryota Yasudo; Kentaro Sano; Hideki Takase (FPT, 2022)

F2MKD: Fog-enabled Federated Learning with Mutual Knowledge Distillation. - Yusuke Yamasaki; Hideki Takase (CCNC, 2023)

An asynchronous federated learning focusing on updated models for decentralized systems with a practical framework. - Yusuke Kanamori; Yusuke Yamasaki; Shintaro Hosoai; Hiroshi Nakamura; Hideki Takase (COMPSAC, 2023)

Resource Allocation Methods among Server Clusters in a Resource Permeating Distributed Computing Platform for 5G Networks. - Daisuke Sasaki; Hiroki Kashiwazaki; Mitsuhiro Osaki; Kazuma Nishiuchi; Ikuo Nakagawa; Shunsuke Kikuchi; Yutaka Kikuchi; Shintaro Hosoai; Hideki Takase (COMPSAC, 2023)

Performance Modeling and Scalability Analysis of Stream Computing in ESSPER FPGA Clusters. - Ryota Miyagi; Ryota Yasudo; Kentaro Sano; Hideki Takase (ICFPT, 2023)

An Area-Efficient Coarse-Grained Reconfigurable Array Design for Approximate Computing. - Kaito Kutsuna; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (MCSoC, 2023)

ILP Based Mapping for Elastic CGRAs. - Makoto Saito; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (RTCSA, 2023)

Memory-saving LDoS Attacker Detection Algorithms in Zigbee Network. - Satoshi Okada; Kunio Akashi; Daisuke Miyamoto; Yuji Sekiya; Hideki Takase; Hiroshi Nakamura (J. Inf. Process., 2023)

XAI-driven Adversarial Attacks on Network Intrusion Detectors. - Satoshi Okada; Houda Jmila; Kunio Akashi; Takuho Mitsunaga; Yuji Sekiya; Hideki Takase; Gregory Blanc; Hiroshi Nakamura (EICC, 2024)

Ph.D. Project: Field-Programmable Computing for Bayesian Network Structure Learning. - Ryota Miyagi; Hideki Takase (FCCM, 2024)

MLIR-Based Homomorphic Encryption Compiler for GPU. - Ai Nozaki; Takuya Kojima; Hiroshi Nakamura; Hideki Takase (HEART, 2024)

A Scalable Mapping Method for Elastic CGRAs. - Makoto Saito; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (IPDPS (Workshops), 2024)

A Resource Allocation Method in Multi-access Edge Computing Environment Based on Deep Reinforcement Learning. - Huilin Li; Hiroshi Nakamura; Hideki Takase (MCSoC, 2024)

A Study on Number Theoretic Transform Acceleration on AMD AI Engine. - Ai Nozaki; Takuya Kojima; Hiroshi Nakamura; Hideki Takase (MCSoC, 2024)

Exploring the Possibility of TypiClust for Low-Budget Federated Active Learning. - Yuta Ono; Hiroshi Nakamura; Hideki Takase (COMPSAC, 2025)

Modeling Memory Usage in Training of Reversible Residual Network for Parallel Distributed Processing. - Kensuke Setsu; Ryota Miyagi; Hiroshi Nakamura; Hideki Takase (HEART, 2025)

A Decoupled Coarse-Grained Reconfigurable Architecture by Introducing Data Flow Management Unit. - Hisako Ito; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (IPDPS (Workshops), 2025)

An Open-Source Framework for Efficient Side-Channel Analysis on Cryptographic Implementations. - Takuya Kojima; Masaki Morita; Hideki Takase; Hiroshi Nakamura (IACR Cryptol. ePrint Arch., 2025)

A Scalable Accelerator for Local Score Computation of Structure Learning in Bayesian Networks. - Ryota Miyagi; Ryota Yasudo; Kentaro Sano; Hideki Takase (ACM Trans. Reconfigurable Technol. Syst., 2025)

TFHE-SBC: Software Designs for Fully Homomorphic Encryption over the Torus on Single Board Computers. - Marin Matsumoto; Ai Nozaki; Hideki Takase; Masato Oguchi (CoRR, 2025)

Xai-driven black-box adversarial attacks on network intrusion detectors. - Satoshi Okada; Houda Jmila; Kunio Akashi; Takuho Mitsunaga; Yuji Sekiya; Hideki Takase; Gregory Blanc; Hiroshi Nakamura (Int. J. Inf. Sec., 2025)