A Balanced-Mesh Clock Routing Technique Using Circuit Partitioning. - Hidenori Sato; Akira Onozawa; Hiroaki Matsuda (ED&TC, 1996)

A single-chip MPEG2 422@ML video, audio, and system encoder with a 162-MHz media-processor and dual motion estimation cores. - Satoshi Kumaki; Tetsuya Matsumura; Kamya Ishihara; Hiroshi Segawa; Kiyofumi Kawamoto; Hideo Ohira; Toshiaki Shimada; Hidenori Sato; Takashi Hattori; Tetsuro Wada; Hiroshi Honma; Tetsuya Watanabe; et al. (CICC, 1999)

MPEG-2 4: 2: 2@HL encoder chip set. - Hidenori Sato; Hideo Ohira; Masahiko Kazayama; Ayako Harada; Masahiko Yoshimoto; Okikazu Tanno; Satoshi Kumaki; Kazuya Ishibara; Atsuo Hanami; Tetsuya Mutsumura (ISCAS, 2000)

Optimizing Network 3D Data Transmissions for Interactive Applications. - Ikuo Harada; Hidenori Sato; Hitoshi Kitazawa (PG, 2000)

A 99-mm2, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system. - Satoshi Kumaki; Hidehiro Takata; Yoshihide Ajioka; Tsukasa Ooishi; Kazuya Ishihara; Atsuo Hanami; Takaharu Tsuji; Yusuke Kanehira; Tetsuya Watanabe; Chikayoshi Morishima; Tomoaki Yoshizawa; Hidenori Sato; et al. (CICC, 2001)

Hexagonal Image Representation for 3-D Photorealistic Reconstruction. - Hidenori Sato; Hiroto Matsuoka; Akira Onozawa; Hitoshi Kitazawa (ICPR (2), 2002)

Necessary and sufficient conditions for one-dimensional discrete-time binary cellular neural networks with both A- and B-templates to be stable. - Tetsuo Nishi; Hidenori Sato; Norikazu Takahashi (ISCAS (1), 2002)

Regeneration of real objects in the real world. - Hiroto Matsuoka; Akira Onozawa; Hidenori Sato; Hisao Nojima (SIGGRAPH Abstracts and Applications, 2002)

Necessary and Sufficient Conditions for One-Dimensional Discrete-Time Binary Cellular Neural Networks with Unspecified Fixed Boundaries to Be Stable. - Hidenori Sato; Tetsuo Nishi; Norikazu Takahashi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

A 99-mm2 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system. - Satoshi Kumaki; Hidehiro Takata; Yoshihide Ajioka; Tsukasa Ooishi; Kazuya Ishihara; Atsuo Hanami; Takaharu Tsuji; Tetsuya Watanabe; Chikayoshi Morishima; Tomoaki Yoshizawa; Hidenori Sato; Shin-ichi Hattori; et al. (IEEE J. Solid State Circuits, 2002)

A Mirror Metaphor Interaction System: Touching Remote Real Objects in an Augmented Reality Environment. - Eiichi Hosoya; Miki Kitabata; Hidenori Sato; Ikuo Harada; Hisao Nojima; Fumiharu Morisawa; Shinichiro Mutoh; Akira Onozawa (ISMAR, 2003)

A static and dynamic energy reduction technique for I-cache and BTB in embedded processors. - Hidenori Sato; Toshinori Sato (ASP-DAC, 2004)

Arm-Pointer: 3D Pointing Interface for Real-World Interaction. - Eiichi Hosoya; Hidenori Sato; Miki Kitabata; Ikuo Harada; Hisao Nojima; Akira Onozawa (ECCV Workshop on HCI, 2004)

Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors. - Toshinori Sato; Yuu Tanaka; Hidenori Sato; Toshimasa Funaki; Takenori Koushiro; Akihiro Chiyonobu (PATMOS, 2006)

Image-Based Photorealistic 3D Reconstruction Using Hexagonal Representation. - Hidenori Sato; Hiroto Matsuoka; Hitoshi Kitazawa; Akira Onozawa (Inf. Media Technol., 2006)

Realizing Energy-Efficient MultiCore Processors by Utilizing Speculative Thread-Level Parallelism. - Toshinori Sato; Yuu Tanaka; Hidenori Sato; Toshimasa Funaki; Takenori Koushiro; Akihiro Chiyonobu (Int. J. Comput. Their Appl., 2007)

A multi-standards HDTV video decoder for blu-ray disc standard. - Noriyuki Minegishi; Hidenori Sato; Fumitaka Izuhara; Masayuki Koyama; Anthony Vetro (IEEE Trans. Consumer Electron., 2009)