Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor. - Hidetomo Kobayashi; Kiyoshi Kato; Takuro Ohmaru; Seiichi Yoneda; Tatsuji Nishijima; Shuhei Maeda; Kazuaki Ohshima; Hikaru Tamura; Hiroyuki Tomatsu; Tomoaki Atsumi; Yutaka Shionoiri; Yukio Maehashi; et al. (COOL Chips, 2013)

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating. - Hikaru Tamura; Kiyoshi Kato; Takahiko Ishizu; Tatsuya Onuki; Wataru Uesugi; Takuro Ohmaru; Kazuaki Ohshima; Hidetomo Kobayashi; Seiichi Yoneda; Atsuo Isobe; Naoaki Tsutsui; Suguru Hondo; et al. (COOL Chips, 2014)

Two-Dimensionally Arranged Display Drivers Achieved by OS/Si Structure. - Yusuke Komura; Shoki Miyata; Yuki Okamoto; Yuki Tamatsukuri; Hiroki Inoue; Toshihiko Saito; Munehiro Kozuma; Hidetomo Kobayashi; Tatsuya Onuki; Yuichi Yanagisawa; Toshihiko Takeuchi; Yutaka Okazaki; et al. (VLSI Technology and Circuits, 2023)