Speech coding based on adaptive mel-cepstral analysis. - Keiichi Tokuda; Hidetoshi Matsumura; Takao Kobayashi; Satoshi Imai (ICASSP (1), 1994)

Delay variation tolerant clock scheduling for semi-synchronous circuits. - Hidetoshi Matsumura; Atsushi Takahashi 001 (APCCAS (1), 2002)

An FPGA-accelerated partial image matching engine for massive media data searching systems. - Takashi Shimizu; Yasumoto Tomita; Hidetoshi Matsumura; Masahiko Sugimura; Hironobu Yamasaki; David Thach; Takashi Miyoshi; Takayuki Baba; Yasuhiro Watanabe; Atsushi Ike (VLSI Circuits, 2016)

An FPGA-accelerated partial duplicate image retrieval engine for a document search system. - Hidetoshi Matsumura; Masahiko Sugimura; Hironobu Yamasaki; Yasumoto Tomita; Takayuki Baba; Yasuhiro Watanabe (WACV, 2016)

An FPGA-accelerated high-throughput data optimization system for high-speed transfer via wide area network. - Kentaro Katayama; Hidetoshi Matsumura; Hiroaki Kameyama; Shinichi Sazawa; Yasuhiro Watanabe (FPT, 2017)

On the Average Cost and Latency of Migration to the Next Generation of Networks. - Mohammad Javad-Kalbasi; Mikinori Kobayashi; Hidetoshi Matsumura; Masahiko Sugimura; Xi Wang 001; Paparao Palacharla; Shahrokh Valaee (GLOBECOM, 2022)

Speedy and Cost-efficient Optical Network Modernization through Quantum-inspired Computing. - Masahiko Sugimura; Mohammad Javad-Kalbasi; Hidetoshi Matsumura; Xi Wang 001; Paparao Palacharla; Shahrokh Valaee (OFC, 2023)