A High Speed Efficient N x N Bit Multiplier Based on Ancient Indian Vedic Mathematics. - Vishal Verma; Himanshu Thapliyal (VLSI, 2003)

High Speed Efficient N Bit by N Bit Division Algorithm and Architecture Based on Ancient Indian Vedic Mathematics. - Himanshu Thapliyal; Hamid R. Arabnia (ESA/VLSI, 2004)

A Time-Area-Power Efficient Multiplier and Square Architecture Based on Ancient Indian Vedic Mathematics. - Himanshu Thapliyal; Hamid R. Arabnia (ESA/VLSI, 2004)

A Novel Parallel Multiply and Accumulate (V-MAC) Architecture Based on Ancient Indian Vedic Mathematics. - Himanshu Thapliyal; Hamid R. Arabnia (ESA/VLSI, 2004)

A Novel Reversible TSG Gate and Its Application for Designing Reversible Carry Look-Ahead and Other Adder Architectures. - Himanshu Thapliyal; M. B. Srinivas (Asia-Pacific Computer Systems Architecture Conference, 2005)

Design And Analysis of A VLSI Based High Performance Low Power Parallel Square Architecture. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (AMCS, 2005)

Design for A Fast And Low Power 2's Complement Multiplier. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (CDES, 2005)

Verilog Coding Style for Efficient Synthesis In FPGA. - Himanshu Thapliyal; M. B. Srinivas; Rameshwar Rao 001; Hamid R. Arabnia (CDES, 2005)

VLSI Implementation of O(n*n) Sorting Algorithms And Their Hardware Comparison. - Saurabh Kotiyal; Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (CSC, 2005)

A Need of Quantum Computing: Reversible Logic Synthesis of Parallel Binary Adder-Subtractor. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (ESA, 2005)

A Reversible Version of 4 x 4 Bit Array Multiplier With Minimum Gates and Garbage Outputs. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (ESA, 2005)

Reversible Logic Synthesis of Half, Full and Parallel Subtractors. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (ESA, 2005)

Faster RSA Encryption/Decryption Architecture Using an Efficient High Speed Overlay Multiplier. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (Security and Management, 2005)

Implementation of A Fast Square In RSA Encryption/Decryption Architecture. - Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (Security and Management, 2005)

The New BCD Subtractor and Its Reversible Logic Implementation. - Himanshu Thapliyal; M. B. Srinivas (Asia-Pacific Computer Systems Architecture Conference, 2006)

Low Power Hierarchical Multiplier and Carry Look-Ahead Architecture. - Himanshu Thapliyal; Neela Gopi; K. K. Pavan Kumar; M. B. Srinivas (AICCSA, 2006)

Novel Reversible Multiplier Architecture Using Reversible TSG Gate. - Himanshu Thapliyal; M. B. Srinivas (AICCSA, 2006)

Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures. - Himanshu Thapliyal; A. Prasad Vinod 001 (APCCAS, 2006)

Modified Carry Look Ahead BCD Adder With CMOS and Reversible Logic Implementation. - Himanshu Thapliyal; Hamid R. Arabnia (CDES, 2006)

A Reversible Programmable Logic Array (RPLA) Using Fredkin and Feynman Gates for Industrial Electronics and Applications. - Himanshu Thapliyal; Hamid R. Arabnia (CDES, 2006)

Novel NAND and AND Gate Using DNA Ligation and Two Transistors Implementations. - Himanshu Thapliyal; A. Rameshwar; Rajnish Bajpai; Hamid R. Arabnia (CDES, 2006)

A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs. - Himanshu Thapliyal; Vishal Verma; Hamid R. Arabnia (CDES, 2006)

Design of Novel Reversible Carry Look-Ahead BCD Subtractor. - Himanshu Thapliyal; Sumedha K. Gupta (ICIT, 2006)

Novel and Efficient 4: 2 and 5: 2 Compressors with Minimum Number of Transistors Designed for Low-Power Operations. - Pallavi Devi Gopineedi; Himanshu Thapliyal; M. B. Srinivas; Hamid R. Arabnia (ESA, 2006)

Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder. - Himanshu Thapliyal; Anvesh Ramasahayam; Vivek Reddy Kotha; Kunul Gottimukkula; M. B. Srinivas (DELTA, 2006)

Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format. - Himanshu Thapliyal; Saurabh Kotiyal; M. B. Srinivas (VLSI Design, 2006)

A New Reversible TSG Gate and Its Application For Designing Efficient Adder Circuits - Himanshu Thapliyal; M. B. Srinivas (CoRR, 2006)

An Extension to DNA Based Fredkin Gate Circuits: Design of Reversible Sequential Circuits using Fredkin Gates - Himanshu Thapliyal; M. B. Srinivas (CoRR, 2006)

Novel Reversible TSG Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU - Himanshu Thapliyal; M. B. Srinivas (CoRR, 2006)

VLSI Implementation of RSA Encryption System Using Ancient Indian Vedic Mathematics - Himanshu Thapliyal; M. B. Srinivas (CoRR, 2006)

Reversible Programmable Logic Array (RPLA) using Fredkin & Feynman Gates for Industrial Electronics and Applications - Himanshu Thapliyal; Hamid R. Arabnia (CoRR, 2006)

Reduced Area Low Power High Throughput BCD Adders for IEEE 754r Format - Himanshu Thapliyal; Hamid R. Arabnia; M. B. Srinivas (CoRR, 2006)

Reversible Logic to Cryptographic Hardware: A New Paradigm - Himanshu Thapliyal; Mark Zwolinski (CoRR, 2006)

Combined Integer and Floating Point Multiplication Architecture(CIFM) for FPGAs and Its Reversible Logic Implementation - Himanshu Thapliyal; Hamid R. Arabnia; A. Prasad Vinod 001 (CoRR, 2006)

Partial Reversible Gates(PRG) for Reversible BCD Arithmetic. - Himanshu Thapliyal; Hamid R. Arabnia; Rajnish Bajpai; Kamal K. Sharma (CDES, 2007)

Design of Reversible Sequential Elements With Feasibility of Transistor Implementation. - Himanshu Thapliyal; A. Prasad Vinod 001 (ISCAS, 2007)

Designing Efficient Online Testable Reversible Adders With New Reversible Gate. - Himanshu Thapliyal; A. Prasad Vinod 001 (ISCAS, 2007)

Combined Integer and Variable Precision (CIVP) Floating Point Multiplication Architecture for FPGAs. - Himanshu Thapliyal; Hamid R. Arabnia; Rajnish Bajpai; Kamal K. Sharma (PDPTA, 2007)

Concurrently Testable FPGA Design for Molecular QCA using Conservative Reversible Logic Gate. - Himanshu Thapliyal; Nagarajan Ranganathan (ISCAS, 2009)

Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate. - Himanshu Thapliyal; Nagarajan Ranganathan (ISVLSI, 2009)

Conservative QCA Gate (CQCA) for Designing Concurrently Testable Molecular QCA Circuits. - Himanshu Thapliyal; Nagarajan Ranganathan (VLSI Design, 2009)

Efficient Reversible Logic Design of BCD Subtractors. - Himanshu Thapliyal; Hamid R. Arabnia; M. B. Srinivas (Trans. Comput. Sci., 2009)

Design of Reversible Latches Optimized for Quantum Cost, Delay and Garbage Outputs. - Himanshu Thapliyal; Nagarajan Ranganathan (VLSI Design, 2010)

Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs. - Himanshu Thapliyal; Nagarajan Ranganathan (ACM J. Emerg. Technol. Comput. Syst., 2010)

A new reversible design of BCD adder. - Himanshu Thapliyal; N. Ranganathan (DATE, 2011)

Reversible Logic Based Concurrent Error Detection Methodology For Emerging Nanocircuits - Himanshu Thapliyal; Nagarajan Ranganathan (CoRR, 2011)

Design, Synthesis and Test of Reversible Circuits for Emerging Nanotechnologies. - Himanshu Thapliyal (2011)

Mach-Zehnder interferometer based design of all optical reversible binary adder. - Saurabh Kotiyal; Himanshu Thapliyal; Nagarajan Ranganathan (DATE, 2012)

Mach-Zehnder Interferometer Based All Optical Reversible NOR Gates. - Saurabh Kotiyal; Himanshu Thapliyal; Nagarajan Ranganathan (ISVLSI, 2012)

Design, Synthesis and Test of Reversible Circuits for Emerging Nanotechnologies. - Himanshu Thapliyal; Nagarajan Ranganathan (ISVLSI, 2012)

Tutorial T2: Reversible Logic: Fundamentals and Applications in Ultra-Low Power, Fault Testing and Emerging Nanotechnologies, and Challenges in Future. - Himanshu Thapliyal; Nagarajan Ranganathan (VLSI Design, 2012)

A new CRL gate as super class of Fredkin gate to design reversible quantum circuits. - Himanshu Thapliyal; Apeksha Bhatt; Nagarajan Ranganathan (MWSCAS, 2013)

Design of efficient reversible logic-based binary and BCD adder circuits. - Himanshu Thapliyal; Nagarajan Ranganathan (ACM J. Emerg. Technol. Comput. Syst., 2013)

Progress in Reversible Processor Design: A Novel Methodology for Reversible Carry Look-Ahead Adder. - Himanshu Thapliyal; H. V. Jayashree; A. N. Nagamani; Hamid R. Arabnia (Trans. Comput. Sci., 2013)

Design of Testable Reversible Sequential Circuits. - Himanshu Thapliyal; Nagarajan Ranganathan; Saurabh Kotiyal (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Design of Dedicated Reversible Quantum Circuitry for Square Computation. - H. V. Jayashree; Himanshu Thapliyal; Vinod Kumar Agrawal (VLSID, 2014)

Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits. - Saurabh Kotiyal; Himanshu Thapliyal; Nagarajan Ranganathan (VLSID, 2014)

Efficient reversible NOR gates and their mapping in optical computing domain. - Saurabh Kotiyal; Himanshu Thapliyal; Nagarajan Ranganathan (Microelectron. J., 2014)

Design of Reversible Adder-Subtractor and its Mapping in Optical Computing Domain. - Saurabh Kotiyal; Himanshu Thapliyal; Nagarajan Ranganathan (Trans. Comput. Sci., 2014)

Reversible Logic Based Design and Test of Field Coupled Nanocomputing Circuits. - Himanshu Thapliyal; Nagarajan Ranganathan; Saurabh Kotiyal (Field-Coupled Nanocomputing, 2014)

Design of Testable Adder Circuits for Spintronics Based Nanomagnetic Computing. - Carson Labrado; Himanshu Thapliyal; Ronald F. DeMara (iNIS, 2015)

Reversible Logic Based Mapping of Quaternary Sequential Circuits Using QGFSOP Expression. - Mozammel H. A. Khan; Himanshu Thapliyal (ISVLSI, 2015)

Reversible logic based multiplication computing unit using binary tree data structure. - Saurabh Kotiyal; Himanshu Thapliyal; Nagarajan Ranganathan (J. Supercomput., 2015)

QUALPUF: A Novel Quasi-Adiabatic Logic based Physical Unclonable Function. - S. Dinesh Kumar; Himanshu Thapliyal (CISRC, 2016)

FinSAL: A novel FinFET based Secure Adiabatic Logic for energy-efficient and DPA resistant IoT devices. - S. Dinesh Kumar; Himanshu Thapliyal; Azhar Mohammad (ICRC, 2016)

IoT-Based Fall Detection for Smart Home Environments. - Shalom Greene; Himanshu Thapliyal; David Carpenter (iNIS, 2016)

Exploring Human Body Communications for IoT Enabled Ambulatory Health Monitoring Systems. - Prabha Sundaravadivel; Saraju P. Mohanty; Elias Kougianos; Venkata P. Yanambaka; Himanshu Thapliyal (iNIS, 2016)

Energy-Efficient and Secure S-Box Circuit Using Symmetric Pass Gate Adiabatic Logic. - S. Dinesh Kumar; Himanshu Thapliyal; Azhar Mohammad; Vijay Singh; Kalyan S. Perumalla (ISVLSI, 2016)

Design of quaternary 4-2 and 5-2 compressors for nanotechnology. - Fazel Sharifi; Atiyeh Panahi; Hojjat Sharifi; Keivan Navi; Nader Bagherzadeh; Himanshu Thapliyal (Comput. Electr. Eng., 2016)

A Survey of Affective Computing for Stress Detection: Evaluating technologies in stress detection for better health. - Shalom Greene; Himanshu Thapliyal; Allison Caban-Holt (IEEE Consumer Electron. Mag., 2016)

Design Methodologies for Reversible Logic Based Barrel Shifters. - Saurabh Kotiyal; Himanshu Thapliyal (J. Circuits Syst. Comput., 2016)

Mapping of Subtractor and Adder-Subtractor Circuits on Reversible Quantum Gates. - Himanshu Thapliyal (Trans. Comput. Sci., 2016)

Ancilla-input and garbage-output optimized design of a reversible quantum integer multiplier. - H. V. Jayashree; Himanshu Thapliyal; Hamid R. Arabnia; Vinod Kumar Agrawal (J. Supercomput., 2016)

Design procedures and NML cost analysis of reversible barrel shifters optimizing garbage and ancilla lines. - Himanshu Thapliyal; Carson Labrado; Ke Chen (J. Supercomput., 2016)

Erratum to: Design procedures and NML cost analysis of reversible barrel shifters optimizing garbage and ancilla lines. - Himanshu Thapliyal; Carson Labrado; Ke Chen (J. Supercomput., 2016)

UTB-SOI based adiabatic computing for low-power and secure IoT devices. - Himanshu Thapliyal; T. S. S. Varun; S. Dinesh Kumar (CISRC, 2017)

Low-Power and Secure Lightweight Cryptography Via TFET-Based Energy Recovery Circuits. - Himanshu Thapliyal; T. S. S. Varun; S. Dinesh Kumar (ICRC, 2017)

Design of majority logic based approximate arithmetic circuits. - Carson Labrado; Himanshu Thapliyal; Fabrizio Lombardi (ISCAS, 2017)

Energy-efficient magnetic circuits based on nanoelectronic devices. - Fazel Sharifi; Himanshu Thapliyal (ISCAS, 2017)

Security Evaluation of MTJ/CMOS Circuits Against Power Analysis Attacks. - S. Dinesh Kumar; Himanshu Thapliyal (iNIS, 2017)

Quantum Circuit Designs of Integer Division Optimizing T-Count and T-Depth. - Himanshu Thapliyal; T. S. S. Varun; Edgard Muñoz-Coreas; Keith A. Britt; Travis S. Humble (iNIS, 2017)

Design of Quantum Circuits for Galois Field Squaring and Exponentiation. - Edgard Muñoz-Coreas; Himanshu Thapliyal (ISVLSI, 2017)

Adiabatic Computing Based Low-Power and DPA-Resistant Lightweight Cryptography for IoT Devices. - Himanshu Thapliyal; T. S. S. Varun; S. Dinesh Kumar (ISVLSI, 2017)

Heuristic Based Majority/Minority Logic Synthesis for Emerging Technologies. - Vipul Kumar Mishra; Himanshu Thapliyal (VLSID, 2017)

Stress Detection and Management: A Survey of Wearable Smart Health Devices. - Himanshu Thapliyal; Vladislav Khalus; Carson Labrado (IEEE Consumer Electron. Mag., 2017)

T-count Optimized Design of Quantum Integer Multiplication. - Edgard Muñoz-Coreas; Himanshu Thapliyal (CoRR, 2017)

Design exploration of a Symmetric Pass Gate Adiabatic Logic for energy-efficient and secure hardware. - S. Dinesh Kumar; Himanshu Thapliyal; Azhar Mohammad; Kalyan S. Perumalla (Integr., 2017)

Energy-efficient magnetic 4-2 compressor. - Himanshu Thapliyal; Azhar Mohammad; S. Dinesh Kumar; Fazel Sharifi (Microelectron. J., 2017)

Efficient Circuit Design of Reversible Square. - H. V. Jayashree; Himanshu Thapliyal; Vinod Kumar Agrawal (Trans. Comput. Sci., 2017)

Automatic synthesis of quaternary quantum circuits. - Mozammel H. A. Khan; Himanshu Thapliyal; Edgard Muñoz-Coreas (J. Supercomput., 2017)

T-count Optimized Quantum Circuits for Bilinear Interpolation. - Edgard Muñoz-Coreas; Himanshu Thapliyal (IGSC, 2018)

IoT based indoor location detection system for smart home environment. - Rajdeep Kumar Nath; Rajnish Bajpai; Himanshu Thapliyal (ICCE, 2018)

Panel theme: Energy and cybersecurity constraints on consumer electronics. - Himanshu Thapliyal (ICCE, 2018)

Energy-recovery based hardware security primitives for low-power embedded devices. - Himanshu Thapliyal; S. Dinesh Kumar (ICCE, 2018)

Hardware Trojan Detection in Implantable Medical Devices Using Adiabatic Computing. - Zach Kahleifeh; S. Dinesh Kumar; Himanshu Thapliyal (ICRC, 2018)

Towards Photoplethysmogram Based Non-Invasive Blood Pressure Classification. - Rajdeep Kumar Nath; Himanshu Thapliyal; Allison Caban-Holt (iSES, 2018)

Amazon Echo Enabled IoT Home Security System for Smart Home Environment. - Himanshu Thapliyal; Nathan Ratajczak; Ole Wendroth; Carson Labrado (iSES, 2018)

Solar Cell Based Physically Unclonable Function for Cybersecurity in IoT Devices. - S. Dinesh Kumar; Carson Labrado; Riasad Badhan; Himanshu Thapliyal; Vijay Singh (ISVLSI, 2018)

Internet of Things-Based Consumer Electronics: Reviewing Existing Consumer Electronic Devices, Systems, and Platforms and Exploring New Research Paradigms. - Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2018)

Smart Home Environment for Mild Cognitive Impairment Population: Solutions to Improve Care and Quality of Life. - Himanshu Thapliyal; Rajdeep Kumar Nath; Saraju P. Mohanty (IEEE Consumer Electron. Mag., 2018)

T-count and Qubit Optimized Quantum Circuit Design of the Non-Restoring Square Root Algorithm. - Edgard Muñoz-Coreas; Himanshu Thapliyal (ACM J. Emerg. Technol. Comput. Syst., 2018)

FinSAL: FinFET-Based Secure Adiabatic Logic for Energy-Efficient and DPA Resistant IoT Devices. - S. Dinesh Kumar; Himanshu Thapliyal; Azhar Mohammad (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Solving Energy and Cybersecurity Constraints in IoT Devices Using Energy Recovery Computing. - Himanshu Thapliyal; Zachary Kahleifeh (ACM Great Lakes Symposium on VLSI, 2019)

Design of Quantum Circuits for Cryptanalysis and Image Processing Applications. - Edgard Muñoz-Coreas; Himanshu Thapliyal (ISVLSI, 2019)

Post-Layout Simulation of Quasi-Adiabatic Logic Based Physical Unclonable Function. - Yasuhiro Takahashi; Hiroki Koyasu; S. Dinesh Kumar; Himanshu Thapliyal (ISVLSI, 2019)

Approximate Energy Recovery 4-2 Compressor for Low-Power Sub-GHz IoT Applications. - Himanshu Thapliyal; Zachary Kahleifeh (ISVLSI, 2019)

Hardware Security Primitives for Vehicles. - Carson Labrado; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2019)

Emerging Paradigms in Vehicular Cybersecurity. - Himanshu Thapliyal; Saraju P. Mohanty; Stacy J. Prowell (IEEE Consumer Electron. Mag., 2019)

Quantum Computing Circuits and Devices. - Travis S. Humble; Himanshu Thapliyal; Edgard Muñoz-Coreas; Fahd A. Mohiyaddin; Ryan S. Bennink (IEEE Des. Test, 2019)

Design of a Piezoelectric-Based Physically Unclonable Function for IoT Security. - Carson Labrado; Himanshu Thapliyal (IEEE Internet Things J., 2019)

Design of Quantum Computing Circuits. - Himanshu Thapliyal; Edgard Muñoz-Coreas (IT Prof., 2019)

Use of Thermistor Temperature Sensors for Cyber-Physical System Security. - Carson Labrado; Himanshu Thapliyal; Stacy J. Prowell; P. Teja Kuruganti (Sensors, 2019)

Quantum Circuit Design of a T-count Optimized Integer Multiplier. - Edgard Muñoz-Coreas; Himanshu Thapliyal (IEEE Trans. Computers, 2019)

EE-SPFAL: A Novel Energy-Efficient Secure Positive Feedback Adiabatic Logic for DPA Resistant RFID and Smart Card. - S. Dinesh Kumar; Himanshu Thapliyal; Azhar Mohammad (IEEE Trans. Emerg. Top. Comput., 2019)

Special Session: A Novel Low-Power and Energy-Efficient Adiabatic Logic-In-Memory Architecture Using CMOS/MTJ. - Himanshu Thapliyal; S. Dinesh Kumar (ICCD, 2020)

Special Session: Quantum Carry Lookahead Adders for NISQ and Quantum Image Processing. - Himanshu Thapliyal; Edgard Muñoz-Coreas; Vladislav Khalus (ICCD, 2020)

Harnessing Uncertainty in Photoresistor Sensor for True Random Number Generation in IoT Devices. - Amit Degada; Himanshu Thapliyal (ICCE, 2020)

Validating Physiological Stress Detection Model Using Cortisol as Stress Bio Marker. - Rajdeep Kumar Nath; Himanshu Thapliyal; Allison Caban-Holt (ICCE, 2020)

Approximate Adder Circuits Using Clocked CMOS Adiabatic Logic (CCAL) for IoT Applications. - Cole Terrell; Himanshu Thapliyal (ICCE, 2020)

Smart Home Sensor Anomaly Detection Using Convolutional Autoencoder Neural Network. - Tyler Cultice; Dan Ionel; Himanshu Thapliyal (iSES, 2020)

Technology Innovations for Smart Cities and Smart Villages. - Himanshu Thapliyal; Saraju P. Mohanty; Rajnish Bajpai (iSES, 2020)

A PUF Based CAN Security Framework. - Tyler Cultice; Carson Labrado; Himanshu Thapliyal (ISVLSI, 2020)

Low-Power and Energy-Efficient Full Adders With Approximate Adiabatic Logic for Edge Computing. - Wu Yang; Himanshu Thapliyal (ISVLSI, 2020)

2-Phase Energy-Efficient Secure Positive Feedback Adiabatic Logic for CPA-Resistant IoT Devices. - Zachary Kahleifeh; Himanshu Thapliyal (WF-IoT, 2020)

PPG Based Continuous Blood Pressure Monitoring Framework for Smart Home Environment. - Rajdeep Kumar Nath; Himanshu Thapliyal (WF-IoT, 2020)

Machine Learning Based Solutions for Real-Time Stress Monitoring. - Rajdeep Kumar Nath; Himanshu Thapliyal; Allison Caban-Holt; Saraju P. Mohanty (IEEE Consumer Electron. Mag., 2020)

T-count and Qubit Optimized Quantum Circuit Designs of Carry Lookahead Adder. - Himanshu Thapliyal; Edgard Muñoz-Coreas; Vladislav Khalus (CoRR, 2020)

Design of Adiabatic Logic-Based Energy-Efficient and Reliable PUF for IoT Devices. - S. Dinesh Kumar; Himanshu Thapliyal (ACM J. Emerg. Technol. Comput. Syst., 2020)

Exploration of Solar Cell Materials for Developing Novel PUFs in Cyber-Physical Systems. - Carson Labrado; S. Dinesh Kumar; Riasad Badhan; Himanshu Thapliyal; Vijay Singh (SN Comput. Sci., 2020)

Quasi-Adiabatic SRAM Based Silicon Physical Unclonable Function. - Yasuhiro Takahashi; Hiroki Koyasu; S. Dinesh Kumar; Himanshu Thapliyal (SN Comput. Sci., 2020)

2-SPGAL: 2-Phase Symmetric Pass Gate Adiabatic Logic for Energy-Efficient Secure Consumer IoT. - Amit Degada; Himanshu Thapliyal (ICCE, 2021)

Consumer Technologies for Smart Cities to Smart Villages. - Saraju P. Mohanty; Himanshu Thapliyal; Rajnish Bajpai (ICCE, 2021)

Low-Energy and CPA-Resistant Adiabatic CMOS/MTJ Logic for IoT Devices. - Zachary Kahleifeh; Himanshu Thapliyal (ISVLSI, 2021)

Wearable Health Monitoring System for Older Adults in a Smart Home Environment. - Rajdeep Kumar Nath; Himanshu Thapliyal (ISVLSI, 2021)

Quantum Annealing for Automated Feature Selection in Stress Detection. - Rajdeep Kumar Nath; Himanshu Thapliyal; Travis S. Humble (ISVLSI, 2021)

Machine Learning Based Prediction of Future Stress Events in a Driving Scenario. - Joseph Clark; Rajdeep Kumar Nath; Himanshu Thapliyal (WF-IoT, 2021)

Smart Village: An IoT Based Digital Transformation. - Amit Degada; Himanshu Thapliyal; Saraju P. Mohanty (WF-IoT, 2021)

An Integrated TRNG-PUF Architecture Based on Photovoltaic Solar Cells. - Amit Degada; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2021)

Physical Unclonable Function (PUF)-Based Sustainable Cybersecurity. - Himanshu Thapliyal; Saraju P. Mohanty (IEEE Consumer Electron. Mag., 2021)

Consumer Technology-Based Solutions for COVID-19. - Himanshu Thapliyal; Katina Michael; Saraju P. Mohanty; M. B. Srinivas; Madhavi K. Ganapathiraju (IEEE Consumer Electron. Mag., 2021)

Quantum Carry Lookahead Adders for NISQ and Quantum Image Processing. - Himanshu Thapliyal; Edgard Muñoz-Coreas; Vladislav Khalus (CoRR, 2021)

EE-ACML: Energy-Efficient Adiabatic CMOS/MTJ Logic for CPA-Resistant IoT Devices. - Zachary Kahleifeh; Himanshu Thapliyal (Sensors, 2021)

Novel Secure MTJ/CMOS Logic (SMCL) for Energy-Efficient and DPA-Resistant Design. - S. Dinesh Kumar; Zachary Kahleifeh; Himanshu Thapliyal (SN Comput. Sci., 2021)

A Review of Machine Learning Classification Using Quantum Annealing for Real-World Applications. - Rajdeep Kumar Nath; Himanshu Thapliyal; Travis S. Humble (SN Comput. Sci., 2021)

Quantum circuit designs of carry lookahead adder optimized for T-count T-depth and qubits. - Himanshu Thapliyal; Edgard Muñoz-Coreas; Vladislav Khalus (Sustain. Comput. Informatics Syst., 2021)

Smart Wristband-Based Stress Detection Framework for Older Adults With Cortisol as Stress Biomarker. - Rajdeep Kumar Nath; Himanshu Thapliyal (IEEE Trans. Consumer Electron., 2021)

Exploring the Antecedents of Consumer Electronics IoT Devices Purchase Decision: A Mixed Methods Study. - Debajyoti Pal; Vajirasak Vanijja; Xiangmin Zhang; Himanshu Thapliyal (IEEE Trans. Consumer Electron., 2021)

Quantum Circuit Designs of Integer Division Optimizing T-count and T-depth. - Himanshu Thapliyal; Edgard Muñoz-Coreas; T. S. S. Varun; Travis S. Humble (IEEE Trans. Emerg. Top. Comput., 2021)

Machine Learning-Based Anxiety Detection in Older Adults Using Wristband Sensors and Context Feature. - Rajdeep Kumar Nath; Himanshu Thapliyal (SN Comput. Sci., 2021)

Edge Device Based Stress Detection For Older Adults With Cortisol Biomarker. - Joseph Clark; Himanshu Thapliyal (ICCE, 2022)

A Novel Approach to Quantum Circuit Partitioning. - Joseph Clark; Himanshu Thapliyal; Travis S. Humble (ISVLSI, 2022)

Adiabatic Logic-based STT-MRAM Design for IoT. - Wu Yang; Amit Degada; Himanshu Thapliyal (ISVLSI, 2022)

Adiabatic Logic Based Energy-Efficient Security for Smart Consumer Electronics. - Zachary Kahleifeh; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2022)

Humans in the Loop: Cybersecurity Aspects in the Consumer IoT Context. - Rohani Rohan; Suree Funilkul; Debajyoti Pal; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2022)

Approximate Adiabatic Logic for Low-Power and Secure Edge Computing. - Wu Yang; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2022)

PUF-Based Post-Quantum CAN-FD Framework for Vehicular Security. - Tyler Cultice; Himanshu Thapliyal (Inf., 2022)

Fortifying Vehicular Security through Low Overhead Physically Unclonable Functions. - Carson Labrado; Himanshu Thapliyal; Saraju P. Mohanty (ACM J. Emerg. Technol. Comput. Syst., 2022)

2-Phase Adiabatic Logic for Low-Energy and CPA-Resistant Implantable Medical Devices. - Amit Degada; Himanshu Thapliyal (IEEE Trans. Consumer Electron., 2022)

Guest Editorial Introduction to the Special Section on Immersive Virtual Reality Simulation for Vehicular Technology. - Alberto Cannavò; Fabrizio Lamberti; Himanshu Thapliyal; Ruck Thawonmas (IEEE Trans. Veh. Technol., 2022)

Machine Learning Based Stress Monitoring in Older Adults Using Wearable Sensors and Cortisol as Stress Biomarker. - Rajdeep Kumar Nath; Himanshu Thapliyal; Allison Caban-Holt (J. Signal Process. Syst., 2022)

TDAG: Tree-based Directed Acyclic Graph Partitioning for Quantum Circuits. - Joseph Clark; Travis S. Humble; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2023)

Lightweight Hierarchical Root-of-Trust Framework for CAN-based 3D Printing Security. - Tyler Cultice; Joseph Clark; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2023)

Noise-Resilient and Reduced Depth Approximate Adders for NISQ Quantum Computing. - Bhaskar Gaur; Travis S. Humble; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2023)

A Logarithmic Depth Quantum Carry-Lookahead Modulo (2n - 1) Adder. - Bhaskar Gaur; Edgard Muñoz-Coreas; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2023)

CASD-OA: Context-Aware Stress Detection for Older Adults with Machine Learning and Cortisol Biomarker. - Md. Saif Hassan Onim; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2023)

GTQCP: Greedy Topology-Aware Quantum Circuit Partitioning. - Joseph Clark; Travis S. Humble; Himanshu Thapliyal (QCE, 2023)

Adiabatic/MTJ-Based Physically Unclonable Function for Consumer Electronics Security. - Zachary Kahleifeh; Himanshu Thapliyal; Syed M. Alam (IEEE Trans. Consumer Electron., 2023)

What affects the usage of artificial conversational agents? An agent personality and love theory perspective. - Debajyoti Pal; Vajirasak Vanijja; Himanshu Thapliyal; Xiangmin Zhang (Comput. Hum. Behav., 2023)

Personality is to a Conversational Agent What Perfume is to a Flower. - Faruk Lawal Ibrahim Dutsinma; Debajyoti Pal; Pranab Roy; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2023)

A Novel Hierarchical Security Solution for Controller-Area-Network-Based 3D Printing in a Post-Quantum World. - Tyler Cultice; Joseph Clark; Wu Yang; Himanshu Thapliyal (Sensors, 2023)

Peephole Optimization for Quantum Approximate Synthesis. - Joseph Clark; Himanshu Thapliyal (ISQED, 2024)

WAFER: Wearable, Ambient-Aware Adversarial Fall Event Detection System Using a RISC-V SoC Architecture. - Tamonash Bhattacharyya; Akanksha Lohia; Prasun Ghosal; Himanshu Thapliyal (ISVLSI, 2024)

Quantum Machine Learning for Anomaly Detection in Consumer Electronics. - Sounak Bhowmik; Himanshu Thapliyal (ISVLSI, 2024)

Transfer Learning Based Hybrid Quantum Neural Network Model for Surface Anomaly Detection. - Sounak Bhowmik; Himanshu Thapliyal (ISVLSI, 2024)

Automated Generation of Dual Rail Adiabatic Gates from Binary Decision Diagrams. - Joseph Clark; Elijah Raffel; Himanshu Thapliyal (ISVLSI, 2024)

Anomaly Detection for Real-World Cyber-Physical Security Using Quantum Hybrid Support Vector Machines. - Tyler Cultice; Md. Saif Hassan Onim; Annarita Giani; Himanshu Thapliyal (ISVLSI, 2024)

Residue Number System (RNS) Based Distributed Quantum Addition. - Bhaskar Gaur; Travis S. Humble; Himanshu Thapliyal (ISVLSI, 2024)

Message from the Quantum Computing Workshop Chairs; ISVLSI 2024. - Travis S. Humble; Himanshu Thapliyal (ISVLSI, 2024)

Energy-Efficient Power Analysis Attack Resilient Adiabatic MTJ-Based Nonvolatile CLB. - Milad Tanavardi Nasab; Wu Yang; Himanshu Thapliyal (ISVLSI, 2024)

Predicting Stress in Older Adults with RNN and LSTM from Time Series Sensor Data and Cortisol. - Md. Saif Hassan Onim; Himanshu Thapliyal (ISVLSI, 2024)

Message from the General Chairs; ISVLSI 2024. - Himanshu Thapliyal; Jürgen Becker 001 (ISVLSI, 2024)

Novel Optimized Designs of Modulo 2n+1 Adder for Quantum Computing. - Bhaskar Gaur; Himanshu Thapliyal (CoRR, 2024)

A Logarithmic Depth Quantum Carry-Lookahead Modulo (2n-1) Adder. - Bhaskar Gaur; Edgard Muñoz-Coreas; Himanshu Thapliyal (CoRR, 2024)

Vulnerabilities and Attacks on CAN-Based 3D Printing/Additive Manufacturing. - Tyler Cultice; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2024)

Utilizing Machine Learning for Context-Aware Digital Biomarker of Stress in Older Adults. - Md. Saif Hassan Onim; Himanshu Thapliyal; Elizabeth K. Rhodus (Inf., 2024)

A Review of Context-Aware Machine Learning for Stress Detection. - Md. Saif Hassan Onim; Elizabeth K. Rhodus; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2024)

CAN Bus: The Future of Additive Manufacturing (3D Printing). - Jun-Cheng Chin; Himanshu Thapliyal; Tyler Cultice (IEEE Consumer Electron. Mag., 2024)

Novel Optimized Designs of Modulo 2n+1 Adder for Quantum Computing. - Bhaskar Gaur; Himanshu Thapliyal (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Quantum Transfer Learning to Boost Dementia Detection. - Sounak Bhowmik; Talita Perciano; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2025)

Emotion Detection in Older Adults Using Physiological Signals from Wearable Sensors. - Md. Saif Hassan Onim; Andrew Kiselica; Himanshu Thapliyal (ACM Great Lakes Symposium on VLSI, 2025)

Quantum Hybrid Support Vector Machines for Stress Detection in Older Adults. - Md. Saif Hassan Onim; Travis S. Humble; Himanshu Thapliyal (ICCE, 2025)

Crosstalk Attack Resilient RNS Quantum Addition. - Bhaskar Gaur; Himanshu Thapliyal (ISCAS, 2025)

Detection of Physiological Data Tampering Attacks with Quantum Machine Learning. - Md. Saif Hassan Onim; Himanshu Thapliyal (ISCAS, 2025)

Quantum Properties Trojans (QuPTs) for Attacking Quantum Neural Networks. - Sounak Bhowmik; Travis S. Humble; Himanshu Thapliyal (ISVLSI, 2025)

Emotion Recognition in Older Adults with Quantum Machine Learning and Wearable Sensors. - Md. Saif Hassan Onim; Travis S. Humble; Himanshu Thapliyal (ISVLSI, 2025)

Cognitive and Semantic Computing for Enhanced User Experience. - Vinay Chamola; Himanshu Thapliyal; Hassnaa Moustafa; Biplab Sikdar 001; Amir Hussain 001 (IEEE Consumer Electron. Mag., 2025)

The 3rd Workshop on Quantum in Consumer Technology at IEEE Quantum Week 2024. - Rafael Sotelo 001; Edoardo Giusto; Yuichi Nakamura 002; Jingbo Wang 001; Sreeraman Rajan; Himanshu Thapliyal (IEEE Consumer Electron. Mag., 2025)

MTJ/CMOS-Based CLB Design for Low-Power and CPA-Resistant Secure Nonvolatile FPGA. - Milad Tanavardi Nasab; Himanshu Thapliyal; Garrett S. Rose (IEEE Trans. Very Large Scale Integr. Syst., 2025)

Residue Number System (RNS) based Distributed Quantum Multiplication. - Bhaskar Gaur; Himanshu Thapliyal (CoRR, 2025)

Quantum-Hybrid Support Vector Machines for Anomaly Detection in Industrial Control Systems. - Tyler Cultice; Md. Saif Hassan Onim; Annarita Giani; Himanshu Thapliyal (CoRR, 2025)

Guest Editorial: Selected Papers From IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2024. - Himanshu Thapliyal; Jürgen Becker 001; Garrett S. Rose; Tosiron Adegbija; Selçuk Köse (IEEE Trans. Very Large Scale Integr. Syst., 2025)