Automatic design for bit-serial MSPA architecture. - Hiroaki Kunieda; Yusong Liao; Dongju Li; Kazuhito Ito (ASP-DAC, 1995)

Bit-serial pipeline synthesis and layout for large-scale configurable systems. - Tsuyoshi Isshiki; Wayne Wei-Ming Dai; Hiroaki Kunieda (ASP-DAC, 1997)

High speed bit-serial parallel processing on array architecture. - Kazuhito Ito; Takenobu Shimizugashira; Hiroaki Kunieda (ASP-DAC, 1997)

FPGA for High-Performance Bit-Serial Pipeline Datapath. - Tsuyoshi Isshiki; Takenobu Shimizugashira; Akihisa Ohta; Imanuddin Amril; Hiroaki Kunieda (ASP-DAC, 1998)

Towards one chip HDTV MPEG2 encoder LSI. - Li Jiang; Dongju Li; Shintaro Haba; Chawalit Honsawek; Hiroaki Kunieda (CICC, 1998)

New FPGA Architecture for Bit-Serial Pipeline Datapath. - Akihisa Ohta; Tsuyoshi Isshiki; Hiroaki Kunieda (FCCM, 1998)

A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract). - Tsuyoshi Isshiki; Takenobu Shimizugashira; Akihisa Ohta; Imanuddin Amril; Hiroaki Kunieda (FPGA, 1998)

Motion Estimator LSI for MPEG2 High Level Standard. - Li Jiang; Dongju Li; Shintaro Haba; Chawalit Honsawek; Hiroaki Kunieda (ASP-DAC, 1999)

Efficient anti-aliasing algorithm for computer generated images. - Tsuyoshi Isshiki; Hiroaki Kunieda (ISCAS (4), 1999)

Cost-effective shadowing method using the ED-buffer on an adaptive light cube. - Tsuyoshi Isshiki; Makoto Ishikawa; Hiroaki Kunieda (Vis. Comput., 2000)

H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method. - Tsuyoshi Isshiki; Chawalit Honsawek; Trio Adiono; Kazuhito Ito; Tomohiko Ohtsuka; Dongju Li; Hiroaki Kunieda (ISAS-SCI (1), 2001)

Efficient method for face region quality enhancement in low bit rate video coding. - Trio Adiono; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (APCCAS (1), 2002)

A new methodology for low delay real-time videophone software architecture design. - Trio Adiono; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (APCCAS (2), 2002)

High density bit-serial FPGA with LUT embedding shift register function. - Tsuyoshi Isshiki; Akihisa Ohta; T. Watanabe; T. Nakada; K. Akahane; I. Sisla; Dongju Li; Hiroaki Kunieda (APCCAS (1), 2002)

Realization of fingerprint identification module on DSP board. - Andy Surya Rikin; Yiwen Wang 005; T. Nakada; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (APCCAS (1), 2002)

New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec. - Trio Adiono; Tsuyoshi Isshiki; Chawalit Honsawek; Kazuhito Ito; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

A false-lock-free clock/data recovery PLL for NRZ data using adaptive phase frequency detector. - Gijun Idei; Hiroaki Kunieda (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A Hybrid Method for Fingerprint Image Quality Calculation. - Jinqing Qi; Desiree Abdurrachim; Dongju Li; Hiroaki Kunieda (AutoID, 2005)

New Macroblock Engine Architecture for Video Processing. - Trio Adiono; Dani Fitriyanto; Akhmad Mulyanto; Sumek Wisayataksin; Kazumasa Takeichi; Dongju Li; Tati Rajab Mengko; Hiroaki Kunieda (MVA, 2005)

A Fingerprint Matching Using Minutia Ridge Shape for Low Cost Match-on-Card Systems. - Andy Surya Rikin; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

H.264/AVC decoder SoC towards the low cost mobile video player. - Sumek Wisayataksin; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (SoCC, 2007)

MAPS: an integrated framework for MPSoC application parallelization. - Jianjiang Ceng; Jerónimo Castrillón; Weihua Sheng; Hanno Scharwächter; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Tsuyoshi Isshiki; Hiroaki Kunieda (DAC, 2008)

A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development. - Mohammad Zalfany Urfianto; Tsuyoshi Isshiki; Arif Ullah Khan; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC. - Mohammad Zalfany Urfianto; Tsuyoshi Isshiki; Arif Ullah Khan; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Low Cost SoC Design of H.264/AVC Decoder for Handheld Video Player. - Sumek Wisayataksin; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Trace-driven workload simulation method for Multiprocessor System-On-Chips. - Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda; Toshio Isomura; Kazuo Satou (DAC, 2009)

Entropy Decoding Processor for Modern Multimedia Applications. - Sumek Wisayataksin; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

A novel similarity measurement for minutiae-based fingerprint verification. - Yukun Liu; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (BTAS, 2010)

Ultra fast fingerprint indexing for embedded system. - Ru Zhou; SangWoo Sin; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (SoCPaR, 2010)

Orientation Field Estimation for Embedded Fingerprint Authentication System. - Wei Tang; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Inf. Syst., 2010)

A Unified Performance Estimation Method for Hardware and Software Components in Multiprocessor System-On-Chips. - Arif Ullah Khan; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems. - Yukun Liu; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Inf. Syst., 2011)

Unique Fingerprint-Image-Generation Algorithm for Line Sensors. - Hao Ni; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A reconfigurable ASIP-based approach for high performance image signal processing. - Mochamad Asri; Hsuan-Chun Liao; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (APCCAS, 2012)

Hybrid shared-memory and message-passing multiprocessor system-on-chip for UWB MAC. - Hao Xiao; Tsuyoshi Isshiki; Hiroaki Kunieda; Yuko Nakase; Sadahiro Kimura (ICCE, 2012)

A Reconfigurable High Performance ASIP Engine for Image Signal Processing. - Hsuanchun Liao; Mochamad Asri; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IPDPS Workshops, 2012)

Robust Multiple Minutiae Partitions for Fingerprint Authentication. - Hao Ni; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (ISBAST, 2012)

Application-specific Instruction-Set Processor design methodology for wireless image transmission systems. - Tsuyoshi Isshiki; Hao Xiao; Hsuan-Chun Liao; Dongju Li; Hiroaki Kunieda (ISOCC, 2012)

A High Level Design of Reconfigurable and High-Performance ASIP Engine for Image Signal Processing. - Hsuan-Chun Liao; Mochamad Asri; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012)

Narrow Fingerprint Sensor Verification with Template Updating Technique. - SangWoo Sin; Ru Zhou; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012)

A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer. - Hao Xiao; Tsuyoshi Isshiki; Arif Ullah Khan; Dongju Li; Hiroaki Kunieda; Yuko Nakase; Sadahiro Kimura (IEICE Trans. Inf. Syst., 2012)

Optimized Communication and Synchronization for Embedded Multiprocessors Using ASIP Methodology. - Hao Xiao; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda; Yuko Nakase; Sadahiro Kimura (IPSJ Trans. Syst. LSI Des. Methodol., 2012)

A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine. - Hsuan-Chun Liao; Mochamad Asri; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

Flexible and High Performance ASIPs for Pixel Level Image Processing and Two Dimensional Image Processing. - Hsuan-Chun Liao; Mochamad Asri; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (J. Inf. Process., 2013)

Custom instruction search for application specific instruction-set processor using guided simulated annealing. - Amr Fathy; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (APCCAS, 2014)

Dalvik bytecode acceleration using Fetch/Decode Hardware Extension with hybrid Execution. - Surachai Thongkaew; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (APCCAS, 2014)

Distributed synchronization for message-passing based embedded multiprocessors. - Hao Xiao; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda; Guanyu Zhu (ASAP, 2014)

Retargeting Derivative-ASIP with Assembly Converter Tool. - Agus Bejo; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Inf. Syst., 2014)

A Method of Software Development Tool and Hardware Generation for ASIP with a Co-processor based on the Derivative ASIP Approach. - Agus Bejo; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (J. Inf. Process., 2014)

Online Detection of Spoof Fingers for Smartphone-Based Applications. - Dongju Li; Hiroaki Kunieda; Supawan Kumpituck; Tsuyoshi Isshiki (HPCC/CSS/ICESS, 2015)

Register-Based Process Virtual Machine Acceleration Using Hardware Extension with Hybrid Execution. - Surachai Thongkaew; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)

Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-coupled Thread Model. - Arif Ullah Khan; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IPSJ Trans. Syst. LSI Des. Methodol., 2015)

Dalvik Bytecode Acceleration Using Fetch/Decode Hardware Extension. - Surachai Thongkaew; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (J. Inf. Process., 2015)

An efficient embedded processor for object detection using ASIP methodology. - Shanlin Xiao; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (ASAP, 2016)

A Fast Trace Aware Statistical Based Prediction Model with Burst Traffic Modeling for Contention Stall in A Priority Based MPSoC Bus. - Farhan Shafiq; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IPSJ Trans. Syst. LSI Des. Methodol., 2016)

Efficient Synchronization for Distributed Embedded Multiprocessors. - Hao Xiao; Ning Wu; Fen Ge; Tsuyoshi Isshiki; Hiroaki Kunieda; Jun Xu; Yuangang Wang (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Hybrid Minutiae Descriptor for Narrow Fingerprint Verification. - Zhiqiang Hu; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Inf. Syst., 2017)

Narrow Fingerprint Template Synthesis by Clustering Minutiae Descriptors. - Zhiqiang Hu; Dongju Li; Tsuyoshi Isshiki; Hiroaki Kunieda (IEICE Trans. Inf. Syst., 2017)

Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm. - Shanlin Xiao; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

HOG-Based Object Detection Processor Design Using ASIP Methodology. - Shanlin Xiao; Tsuyoshi Isshiki; Dongju Li; Hiroaki Kunieda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

Hybrid shared-memory and message-passing multiprocessor system-on-chip for UWB MAC layer. - Hao Xiao; Busheng Zheng; Tsuyoshi Isshiki; Hiroaki Kunieda (IET Comput. Digit. Tech., 2017)