Logic Simulation System Using Simulation Processor (SP). - Minoru Saitoh; Kenji Iwata; Akiko Nokamura; Makoto Kakegawa; Junichi Masuda; Hirofumi Hamamura; Fumiyasu Hirose; Nobuaki Kawato (DAC, 1988)

SP2: A Very Large-Scale Event Driven Logic Simulation Hardware. - Hirofumi Hamamura; Hiroaki Komatsu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor. - Noriyuki Ito; Hiroaki Komatsu; Yoshiyasu Tanamura; Ryoichi Yamashita; Hiroyuki Sugiyama; Yaroku Sugiyama; Hirofumi Hamamura (ICCD, 2003)