50-Gb/s 4-b multiplexer/demultiplexer chip set using InP HEMTs. - Kimikazu Sano; Koichi Murata; Suehiro Sugitani; Hirohiko Sugahara; Takatomo Enoki (IEEE J. Solid State Circuits, 2003)

Photoreceiver module using an InP HEMT transimpedance amplifier for over 40 gb/s. - Hiroyuki Fukuyama; Kimikazu Sano; Koichi Murata; Hiroto Kitabayashi; Yasuro Yamane; Takatomo Enoki; Hirohiko Sugahara (IEEE J. Solid State Circuits, 2004)

100-Gb/s multiplexing and demultiplexing IC operations in InP HEMT technology. - Koichi Murata; Kimikazu Sano; Hiroto Kitabayashi; Suehiro Sugitani; Hirohiko Sugahara; Takatomo Enoki (IEEE J. Solid State Circuits, 2004)

Low-power InP-HEMT switch ICs integrating miniaturized 2×2 switches for 10-Gb/s systems. - Hideki Kamitsuna; Yasuro Yamane; Masami Tokumitsu; Hirohiko Sugahara; Masahiro Muraguchi (IEEE J. Solid State Circuits, 2006)