A 4-bit Josephson data processor chip. - Yuji Hatano; Shinichiro Yano; Hiroyuki Mori; Hiroji Yamada; Mikio Hirano; Ushio Kawabe (IEEE J. Solid State Circuits, 1989)

A 4-bit, 250-MIPS processor using Josephson technology. - Yuji Hatano; Shinichiro Yano; Hiroyuki Mori; Hiroji Yamada; Mikio Hirano; Ushio Kawabe (IEEE Micro, 1990)

An all DC-powered Josephson logic circuit. - Yuji Hatano; Hideyuki Nagaishi; Shinichiro Yano; Kouji Nakahara; Hiroji Yamada; Shinya Kominami; Mikio Hirano (IEEE J. Solid State Circuits, 1991)