Scalable pipeline architecture of MMSE MIMO detector for 4×4 MIMO-OFDM receiver. - Shingo Yoshizawa; Hirokazu Ikeuchi; Yoshikazu Miyanaga (ISCAS, 2010)

VLSI Implementation of a Scalable Pipeline MMSE MIMO Detector for a 4×4 MIMO-OFDM Receiver. - Shingo Yoshizawa; Hirokazu Ikeuchi; Yoshikazu Miyanaga (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)