A Compilation Scheme for Macro-Dataflow Computation on Hierarchical Multiprocessor Systems. - Hironori Kasahara; Hiroki Honda; Masahiko Iwata; M. Hirota (ICPP (2), 1990)

Parallel processing of near fine grain tasks using static scheduling OSCAR (optimally scheduled advanced multiprocessor). - Hironori Kasahara; Hiroki Honda; Seinosuke Narita (SC, 1990)

A Multi-Grain Parallelizing Compilation Scheme for OSCAR (Optimally Scheduled Advanced Multiprocessor). - Hironori Kasahara; Hiroki Honda; A. Mogi; A. Ogura; K. Fujiwara; Seinosuke Narita (LCPC, 1991)

Coarse grain parallelism detection scheme of a fortran program. - Hiroki Honda; Hironori Kasahara (Syst. Comput. Jpn., 1991)

Parallel processing scheme of a basic block in a fortran program on oscar. - Hiroki Honda; Satoshi Mizuno; Hironori Kasahara; Seinosuke Narita (Syst. Comput. Jpn., 1991)

A 7 ns 1 Mb BiCMOS ECL SRAM with shift redundancy. - Atsushi Ohba; Shigeki Ohbayashi; Toru Shiomi; Satoshi Takano; Kenji Anami; Hiroki Honda; Yoshiyuki Ishigaki; Masahiro Hatanaka; Shigeo Nagao; Shimpei Kayano (IEEE J. Solid State Circuits, 1991)

A 5.8-ns 256-Kb BiCMOS TTL SRAM with T-Shaped bit line architecture. - Toru Shiomi; Tomohisa Wada; Shigeki Ohbayashi; Atsushi Ohba; Hiroki Honda; Yoshiyuki Ishigaki; Shiro Hine; Kenji Anami; Kimio Suzuki; Tadashi Sumi (IEEE J. Solid State Circuits, 1993)

A 2/3-in 2 million pixel STACK-CCD HDTV imager. - Hirofumi Yamashita; Michio Sasaki; Shinji Ohsawa; Ryohei Miyagawa; Eiji Ohba; Keiji Mabuchi; Nobuo Nakamura; Nagataka Tanaka; Nahoko Endoh; Ikuko Inoue; Yoshiyuki Matsunaga; Yoshitaka Egawa; et al. (IEEE J. Solid State Circuits, 1995)

Distributed Shared Memory with Log Based Consistency for Scalable Data Mining. - Hideaki Hirayama; Hiroki Honda; Toshitsugu Yuba (COMPSAC, 1999)

Performance Measurements on Sandglass-Type Parallelization of Doacross Loops. - Motoyasu Takabatake; Hiroki Honda; Toshitsugu Yuba (HPCN Europe, 1999)

A 500-MHz pipelined burst SRAM with improved SER immunity. - Hirotoshi Sato; Tomohisa Wada; Shigeki Ohbayashi; Kunihiko Kozaru; Yasuyuki Okamoto; Yoshiko Higashide; Tadayuki Shimizu; Yukio Maki; Rui Morimoto; Hisakazu Otoi; Tsuyoshi Koga; Hiroki Honda; et al. (IEEE J. Solid State Circuits, 1999)

Scalable Data Mining with Log Based Consistency DSM for High Performance Distributed Computing. - Hideaki Hirayama; Hiroki Honda; Toshitsugu Yuba (ICECCS, 2000)

Distributed shared memory with log based consistency for operations with commutative law or associative law. - Hideaki Hirayama; Hiroki Honda; Toshitsugu Yuba (Syst. Comput. Jpn., 2001)

DEM-1: A Particle Simulation Machine for Efficient Short-Range Interaction Computations. - Ryo Takata; Kenji Kise; Hiroki Honda; Toshitsugu Yuba (IPDPS, 2002)

SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator. - Kenji Kise; Hiroki Honda; Toshitsugu Yuba (Asia-Pacific Computer Systems Architecture Conference, 2003)

Effect of auto-tuning with user's knowledge for numerical software. - Takahiro Katagiri; Kenji Kise; Hiroki Honda; Toshitsugu Yuba (Conf. Computing Frontiers, 2004)

The SimCore/Alpha Functional Simulator. - Kenji Kise; Takahiro Katagiri; Hiroki Honda; Toshitsugu Yuba (WCAE, 2004)

Macro-Dataflow using Software Distributed Shared Memory. - Hiroshi Tanabe; Hiroki Honda; Toshitsugu Yuba (CLUSTER, 2005)

Evaluation of the Acknowledgment Reduction in a Software-DSM System. - Kenji Kise; Takahiro Katagiri; Hiroki Honda; Toshitsugu Yuba (PPAM, 2005)

Towards scalable and simple software-DSM systems. - Kenji Kise; Takahiro Katagiri; Hiroki Honda; Toshitsugu Yuba (SOSP, 2005)

A time-to-live based reservation algorithm on fully decentralized resource discovery in Grid computing. - Sanya Tangpongprasit; Takahiro Katagiri; Kenji Kise; Hiroki Honda; Toshitsugu Yuba (Parallel Comput., 2005)

Development and Implementation of an Interactive Parallelization Assistance Tool for OpenMP: iPat/OMP. - Makoto Ishihara; Hiroki Honda; Mitsuhisa Sato (IEICE Trans. Inf. Syst., 2006)

ABCLibScript: a directive to support specification of an auto-tuning facility for numerical software. - Takahiro Katagiri; Kenji Kise; Hiroki Honda; Toshitsugu Yuba (Parallel Comput., 2006)

ABCLib_DRSSED: A parallel eigensolver with an auto-tuning facility. - Takahiro Katagiri; Kenji Kise; Hiroki Honda; Toshitsugu Yuba (Parallel Comput., 2006)

F-Omega: A Framework for Steering GridRPC Applications. - Hiromasa Watanabe; Shoichi Hirasawa; Hiroki Honda (eScience, 2007)

Common Description Language of SIMD Instructions for Performance Portability. - Shoichi Hirasawa; Yu Nakanishi; Hiromasa Watanabe; Hiroki Honda (PDPTA, 2008)

Aspects of GPU for general purpose high performance computing. - Reiji Suda; Takayuki Aoki; Shoichi Hirasawa; Akira Nukada; Hiroki Honda; Satoshi Matsuoka (ASP-DAC, 2009)

OMPCUDA : OpenMP Execution Framework for CUDA Based on Omni OpenMP Compiler. - Satoshi Ohshima; Shoichi Hirasawa; Hiroki Honda (IWOMP, 2010)

FLAT: a GPU programming framework to provide embedded MPI. - Takefumi Miyoshi; Hidetsugu Irie; Keigo Shima; Hiroki Honda; Masaaki Kondo; Tsutomu Yoshinaga (GPGPU@ASPLOS, 2012)

Initial Study of Reconfigurable Neural Network Accelerators. - Momoka Ohba; Satoshi Shindo; Shinobu Miwa; Tomoaki Tsumura; Hayato Yamaki; Hiroki Honda (CANDAR, 2016)

Data prediction for response flows in packet processing cache. - Hayato Yamaki; Hiroaki Nishi; Shinobu Miwa; Hiroki Honda (DAC, 2018)

Multi-Level Packet Processing Caches. - Kyosuke Tanaka; Hayato Yamaki; Shinobu Miwa; Hiroki Honda (COOL CHIPS, 2019)

An Overloaded IoT Signal Detection Method using Non-convex Sparse Regularizers. - Kazunori Hayashi; Ayano Nakai-Kasai; Atsuya Hirayama; Hiroki Honda; Tetsuya Sasaki; Hideki Yasukawa; Ryo Hayakawa (APSIPA, 2020)

Evaluating architecture-level optimization in packet processing caches. - Kyosuke Tanaka; Hayato Yamaki; Shinobu Miwa; Hiroki Honda (Comput. Networks, 2020)

RPC: An Approach for Reducing Compulsory Misses in Packet Processing Cache. - Hayato Yamaki; Hiroaki Nishi; Shinobu Miwa; Hiroki Honda (IEICE Trans. Inf. Syst., 2020)

Footprint-Based DIMM Hotplug. - Shinobu Miwa; Masaya Ishihara; Hayato Yamaki; Hiroki Honda; Martin Schulz 001 (IEEE Trans. Computers, 2020)

Received Signal Power based Sensor Zone Estimation with Maximum Likelihood Approach. - Hiroki Honda; Kazunori Hayashi; Gurusanthosh Pabbisetty; Hiroki Mori (APSIPA ASC, 2021)

Analyzing Performance and Power-Efficiency Variations among NVIDIA GPUs. - Kohei Yoshida; Rio Sageyama; Shinobu Miwa; Hayato Yamaki; Hiroki Honda (ICPP, 2022)

CNFET7: An Open Source Cell Library for 7-nm CNFET Technology. - Chenlin Shi; Shinobu Miwa; Tongxin Yang; Ryota Shioya; Hayato Yamaki; Hiroki Honda (ASP-DAC, 2023)

Power-Efficiency Variation on A64FX Supercomputers and its Application to System Operation. - Tomoya Kusaba; Yusuke Awaki; Kohei Yoshida; Shinobu Miwa; Hayato Yamaki; Toshihiro Hanawa; Hiroki Honda (CLUSTER Workshops, 2024)

Evaluating MPI Performance on SGX and Gramine. - Kota Shimojima; Shinobu Miwa; Hayato Yamaki; Hiroki Honda (CLUSTER Workshops, 2024)

CNFET-OCL: Open-Source Cell Libraries for Advanced CNFET Technologies. - Chenlin Shi; Shinobu Miwa; Tongxin Yang; Ryota Shioya; Hayato Yamaki; Hiroki Honda (IEEE Access, 2024)

RAO-SS: A Prototype of Run-time Auto-tuning Facility for Sparse Direct Solvers. - Takahiro Katagiri; Yoshinori Ishii; Hiroki Honda (CoRR, 2024)

Analyzing the impact of CUDA versions on GPU applications. - Kohei Yoshida; Shinobu Miwa; Hayato Yamaki; Hiroki Honda (Parallel Comput., 2024)

CACTI-CNFET: an Analytical Tool for Timing, Power, and Area of SRAMs with Carbon Nanotube Field Effect Transistors. - Shinobu Miwa; Eiichiro Sekikawa; Tongxin Yang; Ryota Shioya; Hayato Yamaki; Hiroki Honda (ASP-DAC, 2025)

VAHRM: Variation-Aware Resource Management in Heterogeneous Supercomputing Systems. - Kohei Yoshida; Ryuichi Sakamoto; Kento Sato; Abhinav Bhatele; Hayato Yamaki; Hiroki Honda; Shinobu Miwa (IEEE Trans. Parallel Distributed Syst., 2025)