An Explicit Lower Bound of 5n - o(n) for Boolean Circuits. - Kazuo Iwama; Hiroki Morizumi (MFCS, 2002)

Reductions for Monotone Boolean Circuits. - Kazuo Iwama; Hiroki Morizumi (MFCS, 2006)

Linear-Size Log-Depth Negation-Limited Inverter for k -Tonic Binary Sequences. - Hiroki Morizumi; Jun Tarui (TAMC, 2007)

A Note on the Inversion Complexity of Boolean Functions in Boolean Formulas - Hiroki Morizumi (CoRR, 2008)

Reductions for monotone Boolean circuits. - Kazuo Iwama; Hiroki Morizumi; Jun Tarui (Theor. Comput. Sci., 2008)

Limiting Negations in Formulas. - Hiroki Morizumi (ICALP (1), 2009)

Negation-Limited Complexity of Parity and Inverters. - Kazuo Iwama; Hiroki Morizumi; Jun Tarui (Algorithmica, 2009)

Limiting negations in non-deterministic circuits. - Hiroki Morizumi (Theor. Comput. Sci., 2009)

Linear-size log-depth negation-limited inverter for k-tonic binary sequences. - Hiroki Morizumi; Jun Tarui (Theor. Comput. Sci., 2009)

Negation-Limited Inverters of Linear Size. - Hiroki Morizumi; Genki Suzuki (IEICE Trans. Inf. Syst., 2010)

Improved approximation algorithms for minimum AND-circuits problem via k-set cover. - Hiroki Morizumi (Inf. Process. Lett., 2011)

Computing All MOD-Functions Simultaneously. - Evgeny Demenkov; Alexander S. Kulikov; Ivan Mihajlin; Hiroki Morizumi (CSR, 2012)

Complexity of Counting Output Patterns of Logic Circuits. - Kei Uchizawa; Zhenghong Wang; Hiroki Morizumi; Xiao Zhou 001 (CATS, 2013)

Sensitivity, Block Sensitivity, and Certificate Complexity of Unate Functions and Read-Once Functions. - Hiroki Morizumi (IFIP TCS, 2014)

Lower Bounds for the Size of Nondeterministic Circuits. - Hiroki Morizumi (COCOON, 2015)

Zero-Suppressed Computation: A New Computation Inspired by ZDDs. - Hiroki Morizumi (CoRR, 2016)

Zero-Suppression and Computation Models. - Hiroki Morizumi (IWOCA, 2018)

Some Results on the Power of Nondeterministic Computation. - Hiroki Morizumi (CoRR, 2018)

On the Power of Nondeterministic Circuits and Co-Nondeterministic Circuits. - Hiroki Morizumi (LATA, 2021)

A Satisfiability Algorithm for Synchronous Boolean Circuits. - Hiroki Morizumi (IEICE Trans. Inf. Syst., 2021)

Computation with Large Advice. - Hiroki Morizumi (CoRR, 2023)

An Approach to Circuit Lower Bounds via Bounded Width Circuits. - Hiroki Morizumi (CoRR, 2023)