Erect of regularity-enhanced layout on printability and circuit performance of standard cells. - Hiroki Sunagawa; Haruhiko Terada; Akira Tsuchiya; Kazutoshi Kobayashi; Hidetoshi Onodera (ISQED, 2009)

Variation-tolerant design of D-flipflops. - Hiroki Sunagawa; Hidetoshi Onodera (SoCC, 2010)

Effect of Regularity-Enhanced Layout on Variability and Circuit Performance of Standard Cells. - Hiroki Sunagawa; Haruhiko Terada; Akira Tsuchiya; Kazutoshi Kobayashi; Hidetoshi Onodera (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Modeling of Random Telegraph Noise under circuit operation - Simulation and measurement of RTN-induced delay fluctuation. - Kyosuke Ito; Takashi Matsumoto; Shinichi Nishizawa; Hiroki Sunagawa; Kazutoshi Kobayashi; Hidetoshi Onodera (ISQED, 2011)