0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits. - Shin-ichi O'Uchi; Kazuhiko Endo; Yongxun Liu; Tadashi Nakagawa; Takashi Matsukawa; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (ESSCIRC, 2010)

A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology. - Shin-ichi O'Uchi; Kazuhiko Endo; Takashi Matsukawa; Yongxun Liu; Tadashi Nakagawa; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (IEICE Trans. Electron., 2012)

Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes. - Wataru Mizubayashi; Koichi Fukuda; Takahiro Mori; Kazuhiko Endo; Yongxun Liu; Takashi Matsukawa; Shin-ichi O'Uchi; Yuki Ishikawa; Shinji Migita; Yukinori Morita; Akihito Tanabe; Junichi Tsukada; et al. (ESSDERC, 2013)

PBTI for N-type tunnel FinFETs. - Wataru Mizubayashi; Takahiro Mori; Koichi Fukuda; Yongxun Liu; Takashi Matsukawa; Yuki Ishikawa; Kazuhiko Endo; Shin-ichi O'Uchi; Junichi Tsukada; Hiromi Yamauchi; Yukinori Morita; Shinji Migita; et al. (ICICDT, 2015)