A 30-ns 64-Mb DRAM with built-in self-test and self-repair function. - Akira Tanabe; Toshio Takeshima; Hiroki Koike; Yoshiharu Aimoto; Masahide Takada; Toshiyuki Ishijima; Naoki Kasai; Hiromitsu Hada; Kentaro Shibahara; Takemitsu Kunio; Takaho Tanigawa; Takanori Saeki; et al. (IEEE J. Solid State Circuits, 1992)

A 30-ns 256-Mb DRAM with a multidivided array structure. - Tadahiko Sugibayashi; Toshio Takeshima; Isao Naritake; Tatsuya Matano; Hiroshi Takada; Yoshiharu Aimoto; Koichiro Furuta; Mamoru Fujita; Takanori Saeki; Hiroshi Sugawara; Tatsunori Murotani; Naoki Kasai; et al. (IEEE J. Solid State Circuits, 1993)

An embedded FeRAM macro cell for a smart card microcontroller. - Tohru Miwa; Junichi Yamada; Yuji Okamoto; Hiroki Koike; Hideo Toyoshiina; Hiromitsu Hada; Yoshihiro Hayashi; Hiroaki Oliizaki; Yoichi Miyasalca; Takemitsu Kunio; Hidenobu Miyamoto; Hideki Gomi; et al. (CICC, 1998)

NV-SRAM: a nonvolatile SRAM with back-up ferroelectric capacitors. - Tohm Miwa; Junichi Yamada; Hiroki Koike; Hideo Toyoshima; Kazushi Amanuma; Sota Kobayashi; Tom Tatsumi; Yukihiro Maejima; Hiromitsu Hada; Takemitsu Kunio (CICC, 2000)

FeRAM device and circuit technologies fully compatible with advanced CMOS. - Hideo Toyoshima; Sota Kobayashi; Junichi Yamada; Tohru Miwa; Hiroki Koike; Hidenori Takeuchi; Hidemitsu Mori; Naoki Kasai; Yukihiko Maejima; Nobuhira Tanabe; Toru Tatsumi; Hiromitsu Hada (CICC, 2001)

NV-SRAM: a nonvolatile SRAM with backup ferroelectric capacitors. - Tohru Miwa; Junichi Yamada; Hiroki Koike; Hideo Toyoshima; Kazushi Amanuma; Sota Kobayashi; Toru Tatsumi; Yukihiko Maejima; Hiromitsu Hada; Takemitsu Kunio (IEEE J. Solid State Circuits, 2001)

A 128-kb FeRAM macro for contact/contactless smart-card microcontrollers. - Junichi Yamada; Tohru Miwa; Hiroki Koike; Hideo Toyoshima; Kazushi Amanuma; Sota Kobayashi; Toru Tatsumi; Yukihiko Maejima; Hiromitsu Hada; Hidemitsu Mori; Seiichi Takahashi; Hidenori Takeuchi; et al. (IEEE J. Solid State Circuits, 2002)

Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode. - Takeshi Honda; Noboru Sakimura; Tadahiko Sugibayashi; Naoki Kasai; Hiromitsu Hada; Shuichi Tahara (IEICE Trans. Electron., 2007)

A 16-Mb Toggle MRAM With Burst Modes. - Tadahiko Sugibayashi; Noboru Sakimura; Takeshi Honda; Kiyokazu Nagahara; Kiyotaka Tsuji; Hideaki Numata; Sadahiko Miura; Ken-ichi Shimura; Yuko Kato; Shinsaku Saito; Yoshiyuki Fukumoto; Hiroaki Honjo; et al. (IEEE J. Solid State Circuits, 2007)

A 90nm 12ns 32Mb 2T1MTJ MRAM. - Ryusuke Nebashi; Noboru Sakimura; Hiroaki Honjo; Shinsaku Saito; Yuichi Ito; Sadahiko Miura; Yuko Kato; Kaoru Mori; Yasuaki Ozaki; Yosuke Kobayashi; Norikazu Ohshima; Keizo Kinoshita; et al. (ISSCC, 2009)

Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS. - Makoto Miyamura; Shogo Nakaya; Munehiro Tada; Toshitsugu Sakamoto; Koichiro Okamoto; Naoki Banno; Shinji Ishida; Kimihiko Ito; Hiromitsu Hada; Noboru Sakimura; Tadahiko Sugibayashi; Masato Motomura (ISSCC, 2011)

Low-power programmable-logic cell arrays using nonvolatile complementary atom switch. - Makoto Miyamura; Toshitsugu Sakamoto; Munehiro Tada; Naoki Banno; Koichiro Okamoto; Noriyuki Iguchi; Hiromitsu Hada (ISQED, 2014)

0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM. - Toshitsugu Sakamoto; Yukihide Tsuji; Munehiro Tada; Hideki Makiyama; Takumi Hasegawa; Yoshiki Yamamoto; Shinobu Okanishi; Keiichi Maekawa; Naoki Banno; Makoto Miyamura; Koichiro Okamoto; Noriyuki Iguchi; et al. (COOL Chips, 2015)

Architecture of Reconfigurable-Logic Cell Array with Atom Switch: Cluster Size & Routing Fabrics (Abstract Only). - Xu Bai; Yukihide Tsuji; Ayuka Morioka; Makoto Miyamura; Toshi Sakamoto; Munehiro Tada; Naoki Banno; Koichiro Okamoto; Noriyuki Iguchi; Hiromitsu Hada (FPGA, 2015)

0.5-V Highly Power-Efficient Programmable Logic using Nonvolatile Configuration Switch in BEOL. - Makoto Miyamura; Toshitsugu Sakamoto; Yukihide Tsuji; Munehiro Tada; Naoki Banno; Koichiro Okamoto; Noriyuki Iguchi; Hiromitsu Hada (FPGA, 2015)

Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM. - Yukihide Tsuji; Xu Bai; Makoto Miyamura; Toshitsugu Sakamoto; Munehiro Tada; Naoki Banno; Koichiro Okamoto; Noriyuki Iguchi; Nobuyuki Sugii; Hiromitsu Hada (VLSIC, 2015)

A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM. - Toshitsugu Sakamoto; Yukihide Tsuji; Munehiro Tada; Hideki Makiyama; Takumi Hasegawa; Yoshiki Yamamoto; Shinobu Okanishi; Keiichi Maekawa; Naoki Banno; Makoto Miyamura; Koichiro Okamoto; Noriyuki Iguchi; et al. (IEEE Micro, 2015)

A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond. - Yukihide Tsuji; Xu Bai; Ayuka Morioka; Makoto Miyamura; Ryusuke Nebashi; Toshitsugu Sakamoto; Munehiro Tada; Naoki Banno; Koichiro Okamoto; Noriyuki Iguchi; Hiromitsu Hada; Tadahiko Sugibayashi (VLSI Circuits, 2016)

NanoBridge-Based FPGA in High-Temperature Environments. - Makoto Miyamura; Toshitsugu Sakamoto; Xu Bai; Yukihide Tsuji; Ayuka Morioka; Ryusuke Nebashi; Munehiro Tada; Naoki Banno; Koichiro Okamoto; Noriyuki Iguchi; Hiromitsu Hada; Tadahiko Sugibayashi; et al. (IEEE Micro, 2017)

Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture. - Hiroki Hihara; Akira Iwasaki; Masanori Hashimoto; Hiroyuki Ochi; Yukio Mitsuyama; Hidetoshi Onodera; Hiroyuki Kanbara; Kazutoshi Wakabayashi; Tadahiko Sugibayashi; Takashi Takenaka; Hiromitsu Hada; Munehiro Tada; et al. (IEEE Embed. Syst. Lett., 2018)

ON-state retention of Atom Switch eNVM for IoT/AI Inference Solution. - Koichiro Okamoto; Ryusuke Nebashi; Naoki Banno; Xu Bai; Hideaki Numata; Noriyuki Iguchi; Makoto Miyamura; Hiromitsu Hada; Kazunori Funahashi; Tadahiko Sugibayashi; Toshitsugu Sakamoto; Munehiro Tada (IRPS, 2020)