Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs. - Takahiro Hanyu; Hiromitsu Kimura; Michitaka Kameyama (ISMVL, 1999)

DRAM-Cell-Based Multiple-Valued Logic-in-Memory VLSI with Charge Addition and Charge Storage. - Takahiro Hanyu; Hiromitsu Kimura; Michitaka Kameyama (ISMVL, 2000)

Multiple-Valued Logic-in-Memory VLSI Based on Ferroelectric Capacitor Storage and Charge Addition. - Hiromitsu Kimura; Takahiro Hanyu; Michitaka Kameyama (ISMVL, 2002)

Multiple-Valued Logic-in-Memory VLSI Using MFSFETs and its Applications. - Hiromitsu Kimura; Takahiro Hanyu; Michitaka Kameyama (J. Multiple Valued Log. Soft Comput., 2003)

A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices. - Hiromitsu Kimura; Kostas Pagiamtzis; Ali Sheikholeslami; Takahiro Hanyu (ISMVL, 2004)

Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI. - Hiromitsu Kimura; Takahiro Hanyu; Michitaka Kameyama; Yoshikazu Fujimori; Takashi Nakamura; Hidemi Takasu (IEEE J. Solid State Circuits, 2004)

TMR-Based Logic-in-Memory Circuit for Low-Power VLSI. - Akira Mochizuki; Hiromitsu Kimura; Mitsuru Ibuki; Takahiro Hanyu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic. - Shoun Matsunaga; Takahiro Hanyu; Hiromitsu Kimura; Takashi Nakamura; Hidemi Takasu (ASP-DAC, 2007)

A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare system. - Shintaro Izumi; Ken Yamashita; Masanao Nakano; Toshihiro Konishi; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Hiroshi Nakajima; Toshikazu Shiga; Masahiko Yoshimoto (ESSCIRC, 2013)

A 38 μA wearable biosignal monitoring system with near field communication. - Ken Yamashita; Shintaro Izumi; Masanao Nakano; Takahide Fujii; Toshihiro Konishi; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Hiroshi Nakajima; Toshikazu Shiga; et al. (NEWCAS, 2013)

A 2.4 pJ ferroelectric-based non-volatile flip-flop with 10-year data retention capability. - Hiromitsu Kimura; Takaaki Fuchikami; Kyoji Marumoto; Yoshikazu Fujimori; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (A-SSCC, 2014)

A 6.14µA normally-off ECG-SoC with noise tolerant heart rate extractor for wearable healthcare systems. - Shintaro Izumi; Ken Yamashita; Masanao Nakano; Tomoki Nakagawa; Yuki Kitahara; Koji Yanagida; Shusuke Yoshimoto; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; et al. (BioCAS, 2014)

Highly Reliable Non-volatile Logic Circuit Technology and Its Application. - Hiromitsu Kimura; Zhiyong Zhong; Yuta Mizuochi; Norihiro Kinouchi; Yoshinobu Ichida; Yoshikazu Fujimori (IEICE Trans. Inf. Syst., 2014)

A low power 6T-4C non-volatile memory using charge sharing and non-precharge techniques. - Tomoki Nakagawa; Shintaro Izumi; Koji Yanagida; Yuki Kitahara; Shusuke Yoshimoto; Yohei Umeki; Haruki Mori; Hiroto Kitahara; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; et al. (ISCAS, 2015)

A ferroelectric-based non-volatile flip-flop for wearable healthcare systems. - Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto; Hiromitsu Kimura; Takaaki Fuchikami; Kyoji Marumoto; Yoshikazu Fujimori (NVMTS, 2015)

A Wearable Healthcare System With a 13.7 µ A Noise Tolerant ECG Processor. - Shintaro Izumi; Ken Yamashita; Masanao Nakano; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Hiroshi Nakajima; Toshikazu Shiga; Masahiko Yoshimoto (IEEE Trans. Biomed. Circuits Syst., 2015)

Normally Off ECG SoC With Non-Volatile MCU and Noise Tolerant Heartbeat Detector. - Shintaro Izumi; Ken Yamashita; Masanao Nakano; Shusuke Yoshimoto; Tomoki Nakagawa; Yozaburo Nakai; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Hiroshi Nakajima; et al. (IEEE Trans. Biomed. Circuits Syst., 2015)

A 15-μA metabolic equivalents monitoring system using adaptive acceleration sampling and normally off computing. - Mio Tsukahara; Shintaro Izumi; Motofumi Nakanishi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori (ICECS, 2016)

A 19-μA metabolic equivalents monitoring SoC using adaptive sampling. - Mio Tsukahara; Shintaro Izumi; Motofumi Nakanishi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori (ASP-DAC, 2017)

A 11.3-µA Physical Activity Monitoring System Using Acceleration and Heart Rate. - Motofumi Nakanishi; Shintaro Izumi; Mio Tsukahara; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Masahiko Yoshimoto (IEICE Trans. Electron., 2018)