Protocol Verification System for SDL Specifications Based on Acyclic Expansion Algorithm and Temporal Logic. - Hironori Saito; Toru Hasegawa; Yoshiaki Kakuda (FORTE, 1991)

An Integrated Approach to Design of Protocol Specifications Using Protocol Validation and Synthesis. - Yoshiaki Kakuda; Hironori Saito (IEEE Trans. Computers, 1991)

Component-based protocol synthesis. - Yoshiaki Kakuda; Yasushi Wakahara; Hironori Saito (Syst. Comput. Jpn., 1992)