A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays. - Muneo Fukaishi; Kazuyuki Nakamura; Hideki Heiuchi; Yoshinori Hirota; Yoetsu Nakazawa; Hidenori Ikeno; Hiroshi Hayama; Michio Yotsuyanagi (IEEE J. Solid State Circuits, 2000)

Evaluation of Users' Adaptation by Applying LZW Compression Algorithm to Operation Logs. - Hiroshi Hayama; Kazuhiro Ueda (KES, 2004)

Panel-Sized TFT-LCD Column Driver. - O. Ishibashi; M. Iriguchi; Keigo Kimura; J. Ishii; D. Sasaki; Hideyuki Imai; H. Tsuchi; Hiroshi Hayama (ISSCC, 2006)

A 2.0Gb/s clock-embedded interface for full-HD 10b 120Hz LCD drivers with 1/5-rate noise-tolerant phase and frequency recovery. - Koichi Yamaguchi; Yoshihiko Hori; Keiichi Nakajima; Kazumasa Suzuki; Masayuki Mizuno; Hiroshi Hayama (ISSCC, 2009)

A 2.0 Gb/s Clock-Embedded Interface for Full-HD 10-Bit 120 Hz LCD Drivers With 1/5-Rate Noise-Tolerant Phase and Frequency Recovery. - Koichi Yamaguchi; Yoshihiko Hori; Keiichi Nakajima; Kazumasa Suzuki; Masayuki Mizuno; Hiroshi Hayama (IEEE J. Solid State Circuits, 2009)