VLSI Parallel Computer with Data Transfer Network: ADENA. - Hiroshi Kadota; Katsuyuki Kaneko; Yuji Tanikawa; Tatsuo Nogi (ICPP (1), 1989)

A VLSI RISC with 20-MFLOPS peak, 64-bit floating-point unit. - Katsuyuki Kaneko; Tadashi Okamoto; Masaitsu Nakajima; Yasuhiro Nakakura; Satoshi Gokita; Junji Nishikawa; Yuji Tanikawa; Hiroshi Kadota (IEEE J. Solid State Circuits, 1989)

Processing element design for a parallel computer. - Katsuyuki Kaneko; Masaitsu Nakajima; Yasuhiro Kakakura; Junji Nishikawa; Ichiro Okabayashi; Hiroshi Kadota (IEEE Micro, 1990)

Parallel computer ADENART - its architecture and application. - Hiroshi Kadota; Katsuyuki Kaneko; Ichiro Okabayashi; Tadashi Okamoto; T. Mimura; Yasuhiro Nakakura; Akiyoshi Wakatani; Masaitsu Nakajima; Junji Nishikawa; K. Zaiki; Tatsuo Nogi (ICS, 1991)

OHMEGA: A VLSI Superscalar Processor Architecture for Numerical Applications. - Masaitsu Nakajima; Hiraku Nakano; Yasuhiro Nakakura; Tadahiro Yoshida; Yoshiyuki Goi; Yuji Nakai; Reiji Segawa; Takeshi Kishida; Hiroshi Kadota (ISCA, 1991)

An 80-MFLOPS (peak) 64-b microprocessor for parallel computer. - Hiraku Nakano; Masaitsu Nakajima; Yasuhiro Nakakura; Tadahiro Yoshida; Yoshiyuki Goi; Yuji Nakai; Reiji Segawa; Takeshi Kishida; Hiroshi Kadota (IEEE J. Solid State Circuits, 1992)

An evaluation of the subframe parallel approach for image clustering. - Akiyoshi Wakatani; Yoshiteru Mino; Hiroshi Kadota (Syst. Comput. Jpn., 1996)

A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the System on a Chip. - Tetsuji Kishi; Mitsuyasu Ohta; Takashi Taniguchi; Hiroshi Kadota (Asian Test Symposium, 2001)

Classification of rice grains using fuzzy artmap neural network. - Chong-Yaw Wee; Raveendran Paramesran; Fumiaki Takeda; Takeo Tsuzuki; Hiroshi Kadota; Satoshi Shimanouchi (APCCAS (2), 2002)

Classification of Rice Grain Using New Scale Invariant Zernike Moments. - Chong-Yaw Wee; Paramesran Raveendran; Fumiaki Takeda; Takeo Tsuzuki; Hiroshi Kadota; Satoshi Shimanouchi (JCIS, 2002)

A new reconfigurable architecture with smart data-transfer subsystems for the intelligent image processing. - Hiroshi Kadota; Yoshiaki Hori; Akiyoshi Wakatani (FPT, 2004)

Selective activation and deactivation of the human brain structures between speeded and precisely timed tapping responses to identical visual stimulus: an fMRI study. - Kazutoshi Kudo; Makoto Miyazaki; Toshitaka Kimura; Kentaro Yamanaka; Hiroshi Kadota; Masaya Hirashima; Yasoichi Nakajima; Kimitaka Nakazawa; Tatsuyuki Ohtsuki (NeuroImage, 2004)

Neurophysiological and Dynamical Control Principles Underlying Variable and Stereotyped Movement Patterns During Motor Skill Acquisition. - Kazutoshi Kudo; Makoto Miyazaki; Hirofumi Sekiguchi; Hiroshi Kadota; Shinya Fujii; Akito Miura; Michiko Yoshie; Hiroki Nakata (J. Adv. Comput. Intell. Intell. Informatics, 2011)