A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism. - Hajime Kubosawa; Naoshi Higaki; Satoshi Ando; Hiromasa Takahashi; Yoshimi Asada; Hideaki Anbutsu; Tomio Sato; Masato Sakate; Atsuhiro Suga; Michihide Kimura; Hideo Miyake; Hiroshi Okano; et al. (IEEE J. Solid State Circuits, 1999)

Sparc64 VIIIfx: A New-Generation Octocore Processor for Petascale Computing. - Takumi Maruyama; Toshio Yoshida; Ryuji Kan; Iwao Yamazaki; Shuji Yamamura; Noriyuki Takahashi; Mikio Hondou; Hiroshi Okano (IEEE Micro, 2010)

K computer: 8.162 PetaFLOPS massively parallel scalar supercomputer built with over 548k cores. - Hiroyuki Miyazaki; Yoshihiro Kusano; Hiroshi Okano; Tatsumi Nakada; Ken Seki; Toshiyuki Shimizu; Naoki Shinjo; Fumiyoshi Shoji; Atsuya Uno; Motoyoshi Kurokawa (ISSCC, 2012)

Sparc64 X: Fujitsu's New-Generation 16-Core Processor for Unix Servers. - Toshio Yoshida; Takumi Maruyama; Yasunobu Akizuki; Ryuji Kan; Naohiro Kiyota; Kiyoshi Ikenishi; Shigeki Itou; Tomoyuki Watahiki; Hiroshi Okano (IEEE Micro, 2013)

Sparc64 XIfx: Fujitsu's Next-Generation Processor for High-Performance Computing. - Toshio Yoshida; Mikio Hondou; Takekazu Tabata; Ryuji Kan; Naohiro Kiyota; Hiroyuki Kojima; Koji Hosoe; Hiroshi Okano (IEEE Micro, 2015)

Cultural Editing for Linking City, Culture and Society. - Hiroshi Okano (Publ., 2015)

An Adaptive-Clocking-Control Circuit With 7.5% Frequency Gain for SPARC Processors. - Tetsutaro Hashimoto; Yukihito Kawabe; Michiharu Hara; Yasushi Kakimura; Kunihiko Tajiri; Shinichiro Shirota; Ryuichi Nishiyama; Hitoshi Sakurai; Hiroshi Okano; Yasumoto Tomita; Sugio Satoh; Hideo Yamashita (IEEE J. Solid State Circuits, 2018)

Implementation of a Strongly Robust Identity-Based Encryption Scheme over Type-3 Pairings. - Hiroshi Okano; Keita Emura; Takuya Ishibashi 001; Toshihiro Ohigashi; Tatsuya Suzuki 002 (Int. J. Netw. Comput., 2020)