A floating-point cell library and a 100-Mflops image signal processor. - Hiroshige Fujii; Chikahiro Hori; Tomoji Takada; Naoyuki Hatanaka; Tatsuhiko Demura; Goichi Ootomo (IEEE J. Solid State Circuits, 1992)

Interleaving based variable ordering methods for ordered binary decision diagrams. - Hiroshige Fujii; Goichi Ootomo; Chikahiro Hori (ICCAD, 1993)

A new reduced clock-swing flip-flop: NAND-type keeper flip-flop (NDKFF). - Motoki Tokumasu; Hiroshige Fujii; Masako Ohta; Tsunealu Fuse; Atsushi Kameyama (CICC, 2002)

A 0.5-V power-supply scheme for low-power system LSIs using multi-Vth SOI CMOS technology. - Tsuneaki Fuse; Masako Ohta; Motoki Tokumasu; Hiroshige Fujii; Shigeru Kawanaka; Atsushi Kameyama (IEEE J. Solid State Circuits, 2003)