Operational-amplifier compilation with performance optimization. - Hidetoshi Onodera; Hiroyuki Kanbara; Keikichi Tamaru (IEEE J. Solid State Circuits, 1990)

High-Level Synthesis of Software Function Calls. - Masanari Nishimura; Nagisa Ishiura; Yoshiyuki Ishimori; Hiroyuki Kanbara; Hiroyuki Tomiyama (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing. - Hiroaki Konoura; Dawood Alnajiar; Yukio Mitsuyama; Hajime Shimada; Kazutoshi Kobayashi; Hiroyuki Kanbara; Hiroyuki Ochi; Takashi Imagawa; Kazutoshi Wakabayashi; Masanori Hashimoto; Takao Onoye; Hidetoshi Onodera (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

Reliability-configurable mixed-grained reconfigurable array compatible with high-level synthesis. - Masanori Hashimoto; Dawood Alnajiar; Hiroaki Konoura; Yukio Mitsuyama; Hajime Shimada; Kazutoshi Kobayashi; Hiroyuki Kanbara; Hiroyuki Ochi; Takashi Imagawa; Kazutoshi Wakabayashi; Takao Onoye; Hidetoshi Onodera (ASP-DAC, 2015)

Distributed memory architecture for high-level synthesis of embedded controllers from Erlang. - Kagumi Azuma; Nagisa Ishiura; Nobuaki Yoshida; Hiroyuki Kanbara (Erlang Workshop, 2017)

Binary synthesis implementing external interrupt handler as independent module. - Naoya Ito; Yuuki Oosako; Nagisa Ishiura; Hiroyuki Kanbara; Hiroyuki Tomiyama (RSP, 2017)

Synthesis of Full Hardware Implementation of RTOS-Based Systems. - Yuuki Oosako; Nagisa Ishiura; Hiroyuki Tomiyama; Hiroyuki Kanbara (RSP, 2018)

Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture. - Hiroki Hihara; Akira Iwasaki; Masanori Hashimoto; Hiroyuki Ochi; Yukio Mitsuyama; Hidetoshi Onodera; Hiroyuki Kanbara; Kazutoshi Wakabayashi; Tadahiko Sugibayashi; Takashi Takenaka; Hiromitsu Hada; Munehiro Tada; et al. (IEEE Embed. Syst. Lett., 2018)