Non-binary cyclic ADC with correlated level shifting technique. - Hiroyuki Tsuchiya; Asato Uchiyama; Yuta Misima; Yuki Watanabe; Tatsuji Matsuura; Hao San; Masao Hotta (ASP-DAC, 2017)

A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components. - Yuki Watanabe; Hayato Narita; Hiroyuki Tsuchiya; Tatsuji Matsuura; Hao San; Masao Hotta (ASP-DAC, 2017)

A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique. - Koken Chin; Yuta Mishima; Yuki Watanabe; Hiroyuki Tsuchiya; Hao San; Tatsuji Matsuura; Masao Hotta (ISPACS, 2017)

The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC. - Hiroyuki Tsuchiya; Yuki Watanabe; Koken Chin; Hao San; Tatsuji Matsuura; Masao Hotta (ISPACS, 2017)

Experimental results of reconfigurable non-binary cyclic ADC. - Yuki Watanabe; Koken Chin; Hiroyuki Tsuchiya; Hao San; Tatsuji Matsuura; Masao Hotta (ISPACS, 2017)

A 0.37W 143dB-Dynamic-Range 1Mpixel Backside-Illuminated Charge-Focusing SPAD Image Sensor with Pixel-Wise Exposure Control and Adaptive Clocked Recharging. - Yasuharu Ota; Kazuhiro Morimoto; Tomoya Sasago; Mahito Shinohara; Yukihiro Kuroda; Wataru Endo; Yu Maehashi; Shintaro Maekawa; Hiroyuki Tsuchiya; Aymantarek Abdelahafar; Shingo Hikosaka; Masanao Motoyama; et al. (ISSCC, 2022)

3D-Stacked 1Megapixel Time-Gated SPAD Image Sensor with 2D Interactive Gating Network for Image Alignment-Free Sensor Fusion. - K. Morimoto; N. Isoda; H. Sekine; Tomoya Sasago; Y. Maehashi; S. Mikajiri; Kenzo Tojima; M. Shinohara; A. Abdelghafar; Hiroyuki Tsuchiya; K. Inoue; S. Omodani; et al. (VLSI Technology and Circuits, 2024)