A 500-MHz pipelined burst SRAM with improved SER immunity. - Hirotoshi Sato; Tomohisa Wada; Shigeki Ohbayashi; Kunihiko Kozaru; Yasuyuki Okamoto; Yoshiko Higashide; Tadayuki Shimizu; Yukio Maki; Rui Morimoto; Hisakazu Otoi; Tsuyoshi Koga; Hiroki Honda; et al. (IEEE J. Solid State Circuits, 1999)

A 58-nm 2-Gb MLC "B4-Flash" Memory with Flexible Multisector Architecture. - Taku Ogura; Yasushi Kasa; Kazuhide Kurosaki; Mitsuhiro Tomoeda; Hisakazu Otoi; Satoshi Shimizu; Masafumi Katsumata; Natsuo Ajika; Kazuo Kobayashi (IEEE J. Solid State Circuits, 2017)