MRAM Write Error Categorization with QCKB. - Yuui Shimizu; Hisanori Aikawa; Keiji Hosotani; Naoharu Shimomura; Tadashi Kai; Yoshihiro Ueda; Yoshiaki Asao; Yoshihisa Iwata; Kenji Tsuchida; Sumio Ikegawa (MTDT, 2006)

A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access Memory. - Yoshiaki Asao; Masayoshi Iwayama; Kenji Tsuchida; Akihiro Nitayama; Hiroaki Yoda; Hisanori Aikawa; Sumio Ikegawa; Tatsuya Kishi (DFT, 2008)

30.6 A 64Gb DDR4 STT-MRAM Using a Time-Controlled Discharge-Reading Scheme for a .001681µm 1T-1MTJ Cross-Point Cell. - Kosuke Hatsuda; Katsuhiko Hoya; Ryosuke Takizawa; Fumiyoshi Matsuoka; Takaya Yasuda; Akira Katayama; Tadashi Miyakawa; Kazuyo Senju; Kazuki Okawa; Yuka Furukawa; Yu Shimada; Katsuya Kotake; et al. (ISSCC, 2025)