Synthesis and Refinement Check of Sequence Diagrams. - Hisashi Miyazaki; Tomoyuki Yokogawa; Sousuke Amasaki; Kazuma Asada; Yoichiro Sato (IEICE Trans. Inf. Syst., 2012)

Consistency Verification of UML Diagrams Based on Process Bisimulation. - Tomoyuki Yokogawa; Sousuke Amasaki; Keisuke Okazaki; Yoichiro Sato; Kazutami Arimoto; Hisashi Miyazaki (PRDC, 2013)

Bounded model checking of Time Petri Nets using SAT solver. - Tomoyuki Yokogawa; Masafumi Kondo; Hisashi Miyazaki; Sousuke Amasaki; Yoichiro Sato; Kazutami Arimoto (IEICE Electron. Express, 2015)