Analysis of the output of FM correlation systems. - Norihiko Morinaga; Hisashi Osawa; Toshihiko Namekawa; Kenji Aoyagi (IEEE Trans. Inf. Theory, 1969)

Output signal-to-noise ratios of FM correlation systems. - Hisashi Osawa; Norihiko Morinaga; Toshihiko Namekawa (IEEE Trans. Inf. Theory, 1971)

A Useful Analytical Method for Discrete Adaptive Delta Modulation. - Saburo Tazaki; Hisashi Osawa; Yasuo Shigematsu (IEEE Trans. Commun., 1977)

An Application of Neural Network Equalization to Polytopic Multiplexing Holography and Reduction of Interpixel Interference. - Hisashi Osawa; Naoki Kawaue; Yoshihiro Okamoto; Yasuaki Nakamura; Hirotaka Ochi; Shoji Marukawa (IEICE Trans. Electron., 2007)

Performance Evaluation of PRML System Based on Thermal Decay Model. - Nobuhiko Shinohara; Keiko Takeuchi; Hisashi Osawa; Yoshihiro Okamoto; Yasuaki Nakamura; Atsushi Nakamoto; Kenji Miura; Hiroaki Muraoka; Yoshihisa Nakamura (IEICE Trans. Electron., 2007)

Performance Improvement System for Perpendicular Magnetic Recording with Thermal Asperity. - Yupin Suppakhun; Pornchai Supnithi; Yoshihiro Okamoto; Yasuaki Nakamura; Hisashi Osawa (IEICE Trans. Electron., 2011)

Write-margin improvement of non-binary LDPC coding and iterative decoding system in BPM R/W channel with write-errors. - Yasuaki Nakamura; Yoshihiro Okamoto; Hisashi Osawa; Hajime Aoi; Hiroaki Muraoka (GLOBECOM, 2012)

Write-margin evaluation of LDPC coding and iterative decoding system in BPM R/W channel with write-errors. - Yasuaki Nakamura; Yoshihiro Okamoto; Hisashi Osawa; Hajime Aoi; Hiroaki Muraoka (ISITA, 2012)

Performance Evaluation of Non-binary LDPC Coding and Iterative Decoding System for BPM R/W Channel with Write-Errors. - Yasuaki Nakamura; Yoshihiro Okamoto; Hisashi Osawa; Hajime Aoi; Hiroaki Muraoka (IEICE Trans. Electron., 2013)

Performance Evaluation of Neuro-ITI Canceller Using a Modified Writing Process for TDMR. - Masato Yamashita; Yoshihiro Okamoto; Yasuaki Nakamura; Hisashi Osawa; Simon J. Greaves; Hiroaki Muraoka (IEICE Trans. Electron., 2013)

Approximate data reuse-based processor: a case study on image compression. - Hisashi Osawa; Yuko Hara-Azumi (ESTIMedia, 2017)

Approximate Data Reuse-based Accelerator Design for Embedded Processor. - Hisashi Osawa; Yuko Hara-Azumi (ACM Trans. Design Autom. Electr. Syst., 2019)