Architecture of a packet switch based on banyan switching network with feedback loops. - Hitoshi Uematsu; Ryuichi Watanabe (IEEE J. Sel. Areas Commun., 1988)

A 1.5 Gb/s 8 X 8 Cross-Connect Switch Using a Time Reservation Algorithm. - Haruhiko Matsunaga; Hitoshi Uematsu (IEEE J. Sel. Areas Commun., 1991)

Hardware-based precise time synchronization on Gb/s Ethernet. - Yoshiaki Yamada; Satoru Ohta; Hitoshi Uematsu (GLOBECOM, 2005)

Hardware-Based Precise Time Synchronization on Gb/s Ethernet Enhanced with Preemptive Priority. - Yoshiaki Yamada; Satoru Ohta; Hitoshi Uematsu (IEICE Trans. Commun., 2006)