A 1.4 V 10-bit 20 MSPS pipelined A/D converter. - Hee-Cheol Choi; Ho-Jin Park; Shin-Kyu Bae; Jae-Whui Kim; Philip Chung 003 (ISCAS, 2000)

A DLL based 10-320 MHz clock synchronizer. - Sung-Sik Hwang; Ki-Mo Joo; Ho-Jin Park; Jae-Whui Kim; Philip Chung 003 (ISCAS, 2000)

A 1 mW 10-bit 500KSPS SAR A/D converter. - Jaejin Park; Ho-Jin Park; Jae-Whui Kim; Sangnam Seo; Philip Chung 003 (ISCAS, 2000)

A 3.3 V 14-bit 10 MSPS calibration-free CMOS pipelined A/D converter. - Seung-Bin You; Ku-Whan Lee; Hee-Cheol Choi; Ho-Jin Park; Jae-Whui Kim; Philip Chung 003 (ISCAS, 2000)

Open Software Architecture for Multiservice Switching System. - Ho-Jin Park; Young-Il Choi; Byung-Sun Lee; Kyung Pyo Jun (ICN (2), 2001)

A Study on B2C Based Electronic Commerce Payment System using the Telephone Number. - Il-Woo Lee; Ho-Jin Park; Dae-Ung Kim; Sang-Ha Kim 001 (ISCC, 2003)

A 2W, 92% efficiency and 0.01% THD+N class-D audio power amplifier for mobile applications, based on the novel SCOM architecture. - Soo-Hyoung Lee; Jae-Young Shin; Ho-Young Lee; Ho-Jin Park; Kristian L. Lund; Karsten Nielsen; Jae-Whui Kim (CICC, 2004)

The proposal of the home device management mechanism on the heterogeneous residential gateway platform. - Hyung-Seop Hong; Ho-Jin Park (Communications, Internet, and Information Technology, 2004)

A new enhanced management approach for heterogeneous service gateways. - Jong-Hoon Lee; Ho-Jin Park (Communications, Internet, and Information Technology, 2004)

A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC. - Tae-Hwan Oh; Ho-Young Lee; Ho-Jin Park; Jae-Whui Kim (ISCAS (1), 2004)

Handover Mechanism for Differentiated QoS in High-Speed Portable Internet. - Ho-Jin Park; Hwa-Sung Kim; Sang-Ho Lee; Youngjin Kim (ICOIN, 2005)

A 4mW per-Channel 101dB-DR Stereo Audio DAC with Transformed Quantization Structure. - Yong-Hee Lee; Moo-Yeol Choi; Seung-Bin You; Wang-Seup Yeum; Ho-Jin Park; Jae-Whui Kim (CICC, 2006)

Developments and Performance Evaluation of Digital-Home Service Delivery & Management Systems. - Il-Woo Lee; Ho-Jin Park; Kwang-Roh Park; Sang-Ha Kim 001 (ICN/ICONS/MCL, 2006)

A Proposed Platform & Performance Estimation of Digital-Home Service Delivery/Management Systems. - Il-Woo Lee; Ho-Jin Park; Kwang-Roh Park; Sang-Ha Kim 001 (ITNG, 2006)

A Study on Architecture and Performance of Service Delivery Platform in Home Networks. - Il-Woo Lee; Ho-Jin Park; Kwang-Roh Park; Sang-Ha Kim 001 (Parallel and Distributed Computing and Networks, 2006)

A Re-configurable 0.5V to 1.2V, 10MS/s to 100MS/s, Low-Power 10b 0.13um CMOS Pipeline ADC. - Young-Ju Kim; Hee-Cheol Choi; Si-Wook Yoo; Seung-Hoon Lee 006; Dae-Young Chung; Kyoung-Ho Moon; Ho-Jin Park; Jae-Whui Kim (CICC, 2007)

A 14-b 30MS/s 0.75mm2 Pipelined ADC with On-Chip Digital Self-Calibration. - Ho-Young Lee; Tae-Hwan Oh; Ho-Jin Park; Hae-Seung Lee; Mark Spaeth; Jae-Whui Kim (CICC, 2007)

A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control. - Moo-Yeol Choi; Sung-No Lee; Seung-Bin You; Wang-Seup Yeum; Ho-Jin Park; Jae-Whui Kim; Hae-Seung Lee (CICC, 2008)

A 16b 10MS/s digitally self-calibrated ADC with time constant control. - Tae-Hwan Oh; Ho-Young Lee; Ju-Hwa Kim; Ho-Jin Park; Kyoung-Ho Moon; Jae-Whui Kim; Hae-Seung Lee (CICC, 2008)

A Peer-to-Peer Service Platform Architecture for Extended Home Services. - Il-Woo Lee; Moon-Ok Choi; Ho-Jin Park (ICN, 2008)

Social Networking Service Based on Peer-to-Peer Network. - Il-Woo Lee; Moon-Ok Choi; Ho-Jin Park; Kwang-Roh Park (ICSNC, 2008)

Service Platform and Social Networking Service Based on Peer-to-Peer Networking. - Il-Woo Lee; Ho-Jin Park; Kwang-Roh Park (CCNC, 2009)

A 9.43-ENOB 160MS/s 1.2V 65nm CMOS ADC based on multi-stage amplifiers. - Young-Ju Kim; Hee-Cheol Choi; Kyung-Hoon Lee; Gil-Cho Ahn; Seung-Hoon Lee 006; Ju-Hwa Kim; Kyoung-Jun Moon; Michael Choi; Kyoung-Ho Moon; Ho-Jin Park; Byeong-Ha Park (CICC, 2009)

An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. - Sunwoo Kwon; Pavan Kumar Hanumolu; Sang-Ho Kim; Sung-No Lee; Seung-Bin You; Ho-Jin Park; Jae-Whui Kim; Un-Ku Moon (CICC, 2009)

A 10b 120MS/s 45nm CMOS ADC using A re-configurable three-stage switched op-amp. - Young-Ju Kim; Kyung-Hoon Lee; Seung-Hak Ji; Yi-Gi Kwon; Seung-Hoon Lee 006; Kyoung-Jun Moon; Michael Choi; Ho-Jin Park; Byeong-Ha Park (CICC, 2010)

A 7b 1GS/s 7.2mW nonbinary 2b/cycle SAR ADC with register-to-DAC direct control. - Hyeok-Ki Hong; Wan Kim; Sun-Jae Park; Michael Choi; Ho-Jin Park; Seung-Tak Ryu (CICC, 2012)

A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer. - Young-min Park; Tae-In Kwon; Kang-Il Cho; Yong-Sik Kwak; Gil-Cho Ahn; Chang-Seob Shin; Myung-Jin Lee; Seung-Bin You; Ho-Jin Park (ICECS, 2012)

An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement. - Hyeok-Ki Hong; Hyun-Wook Kang; Barosaim Sung; Choong-Hoon Lee; Michael Choi; Ho-Jin Park; Seung-Tak Ryu (ISSCC, 2013)

A fully-differential capacitive touch controller with input common-mode feedback for symmetric display noise cancellation. - Kiduk Kim; Sanghyub Kang; Yoon-Kyung Choi; Kyung-Hoon Lee; Choong-Hoon Lee; Jin-chul Lee; Michael Choi; Kyungjun Ko; Joonwoo Jung; Namgu Park; Ho-Jin Park; Gyoocheol Hwang (VLSIC, 2014)

26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique. - Hyeok-Ki Hong; Hyun-Wook Kang; Dong-Shin Jo; Dong-Suk Lee; Yong-Sang You; Yong-Hee Lee; Ho-Jin Park; Seung-Tak Ryu (ISSCC, 2015)

26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOS. - Ba-Ro-Saim Sung; Dong-Shin Jo; Il-Hoon Jang; Dong-Suk Lee; Yong-Sang You; Yong-Hee Lee; Ho-Jin Park; Seung-Tak Ryu (ISSCC, 2015)

A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC. - Hyeok-Ki Hong; Wan Kim; Hyun-Wook Kang; Sun-Jae Park; Michael Choi; Ho-Jin Park; Seung-Tak Ryu (IEEE J. Solid State Circuits, 2015)

Multiple-loop design technique for high-performance low dropout regulator. - Quoc-Hoang Duong; Jeong-Woon Kong; Hyeon-Seok Shin; Huy-Hieu Nguyen; Pan-Jong Kim; Yu-Seok Ko; Hwa-Yeoul Yu; Ho-Jin Park (A-SSCC, 2016)

A high efficiency wide-load-range asynchronous boost converter with time-based dual-mode control for SSD applications. - Kyoungjin Lee; Haneul Kim; Jehyung Yoon; Hyoung-Seok Oh; Byeong-Ha Park; Ho-Jin Park; Yoonmyung Lee (A-SSCC, 2016)

8.3 A 200mA digital low-drop-out regulator with coarse-fine dual loop in mobile application processors. - Yong-Jin Lee; Min-Yong Jung; Shashank Singh 006; Tae-Hwang Kong; Dae-Yong Kim; Kwang-Ho Kim; Sang-Ho Kim; Jae-Jin Park; Ho-Jin Park; Gyu-Hyeong Cho (ISSCC, 2016)

Multiple-Loop Design Technique for High-Performance Low-Dropout Regulator. - Quoc-Hoang Duong; Huy-Hieu Nguyen; Jeong-Woon Kong; Hyun-Seok Shin; Yu-Seok Ko; Hwa-Yeol Yu; Yong-Hee Lee; Chun-Hyeon Bea; Ho-Jin Park (IEEE J. Solid State Circuits, 2017)