37.9 A 14Gb/s/pin 0.163pJ/b DQ Receiver for HBM with Baud-Rate Phase Tracking Loop Supporting Background Offset Calibration. - Jeonghyeon Lee; Ho-Joon Shin; Han-Gon Ko; Kwanseo Park (ISSCC, 2026)

A 1.19-pJ/b 32-Gb/s Baud-Rate Receiver Employing 2UI Integrated Pattern-Based CDR and DFE Adaptation Without Data-Level Reference. - Suil Kang; Sinho Lee; Young-Wook Kim; Junhak Kim; Ho-Joon Shin; Haram Ju; Kwangho Lee; Kwanseo Park (IEEE J. Solid State Circuits, 2026)