A Secure Remote Healthcare System for Hospital Using Blockchain Smart Contract. - Hoai Luan Pham; Thi Hong Tran; Yasuhiko Nakashima (GLOBECOM Workshops, 2018)

Design and Hardware Implementation of Improved Precision Time Protocol for High Speed Automotive Wireless Transmission System. - Pham Hoai Luan; Nguyen Xuan Duc; Duc Khai Lam; Yuhei Nagao; Hiroshi Ochi (ISPACS, 2018)

Digitizing Invoice and Managing VAT Payment Using Blockchain Smart Contract. - Van-Cam Nguyen; Hoai-Luan Pham; Thi Hong Tran; Huu-Thuan Huynh; Yasuhiko Nakashima (IEEE ICBC, 2019)

Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining. - Hoai Luan Pham; Thi Hong Tran; Tri Dung Phan; Vu Trung Duong Le; Duc Khai Lam; Yasuhiko Nakashima (IEEE Access, 2020)

High Performance Multicore SHA-256 Accelerator using Fully Parallel Computation and Local Memory. - Van Dai Phan; Hoai Luan Pham; Thi Hong Tran; Yasuhiko Nakashima (COOL CHIPS, 2021)

MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security. - Vu Trung Duong Le; Thi Hong Tran; Hoai Luan Pham; Duc Khai Lam; Yasuhiko Nakashima (IEEE Access, 2021)

A High-Performance Multimem SHA-256 Accelerator for Society 5.0. - Thi Hong Tran; Hoai Luan Pham; Yasuhiko Nakashima (IEEE Access, 2021)

BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks. - Thi Hong Tran; Hoai Luan Pham; Tri Dung Phan; Yasuhiko Nakashima (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Coarse Grained Reconfigurable Architecture for SHA-2 Acceleration. - Hoai Luan Pham; Thi Hong Tran; Vu Trung Duong Le; Yasuhiko Nakashima (IPDPS Workshops, 2022)

A High-Efficiency FPGA-based BLAKE-256 Accelerator for Securing Blockchain Networks. - Pham Hoai Luan; Thi Hong Tran; Vu Trung Duong Le; Yasuhiko Nakashima (MWSCAS, 2022)

CSIP: A Compact Scrypt IP design with single PBKDF2 core for Blockchain mining. - Vu Trung Duong Le; Pham Hoai Luan; Thi Hong Tran; Yasuhiko Nakashima (SBCCI, 2022)

A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT Applications. - Pham Hoai Luan; Thi Hong Tran; Vu Trung Duong Le; Yasuhiko Nakashima (SBCCI, 2022)

A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator. - Hoai Luan Pham; Thi Hong Tran; Vu Trung Duong Le; Yasuhiko Nakashima (IEEE Access, 2022)

Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator. - Hoai Luan Pham; Thi Hong Tran; Vu Trung Duong Le; Yasuhiko Nakashima (IEEE Access, 2022)

Efficient and High-Speed CGRA Accelerator for Cryptographic Applications. - Vu Trung Duong Le; Hoai Luan Pham; Thi Hong Tran; Thi Sang Duong; Yasuhiko Nakashima (candar, 2023)

Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications. - Vu Trung Duong Le; Hoai Luan Pham; Thi Hong Tran; Quoc Duy Nam Nguyen; Thi Sang Duong; Yasuhiko Nakashima (ICICDT, 2023)

RHCP: A Reconfigurable High-efficient Cryptographic Processor for Decentralized IoT Platforms. - Vu Trung Duong Le; Hoai Luan Pham; Thi Sang Duong; Thi Hong Tran; Quoc Duy Nam Nguyen; Yasuhiko Nakashima (KSE, 2023)

Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission. - Thi Sang Duong; Hoai Luan Pham; Vu Trung Duong Le; Thi Diem Tran; Ren Imamura; Quoc Duy Nam Nguyen; Thi Hong Tran; Yasuhiko Nakashima (MCSoC, 2023)

High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing. - Vu Trung Duong Le; Hoai Luan Pham; Thi Hong Tran; Thi Sang Duong; Yasuhiko Nakashima (MCSoC, 2023)

Energy-Efficient 3D Convolution Using Interposed Memory Accelerator eXtension 2 for Medical Image Processing. - Ren Imamura; Guangxian Zhu; Thi Sang Duong; Hoai Luan Pham; Renyuan Zhang; Yasuhiko Nakashima (MICAD, 2023)

Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain. - Pham Hoai Luan; Thi Sang Duong; Vu Trung Duong Le; Thi Hong Tran; Yasuhiko Nakashima (MWSCAS, 2023)

Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing. - Thi Sang Duong; Hoai Luan Pham; Vu Trung Duong Le; Ren Imamura; Thi Hong Tran; Yasuhiko Nakashima (RIVF, 2023)

Power-Efficient and Programmable Hashing Accelerator for Massive Message Processing. - Thi Sang Duong; Hoai Luan Pham; Vu Trung Duong Le; Thi Hong Tran; Yasuhiko Nakashima (SOCC, 2023)

QuantLaneNet: A 640-FPS and 34-GOPS/W FPGA-Based CNN Accelerator for Lane Detection. - Duc Khai Lam; Cam Vinh Du; Hoai Luan Pham (Sensors, 2023)

Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications. - Hoai Luan Pham; Thi Hong Tran; Vu Trung Duong Le; Yasuhiko Nakashima (IEEE Des. Test, 2023)

A real-time JPEG image compression hardware design architecture. - Lam Duc Khai; Tran Van Quang; Pham Hoai Luan (ACOMPA, 2024)

Benchmarking Classical and Quantum Optimizers for Quantum Simulator. - Vu Tuan Hai 001; Vu Trung Duong Le; Pham Hoai Luan; Yasuhiko Nakashima (CANDAR, 2024)

PESA: Power-Efficient SPHINCS+ Accelerator for Multi-Domain Security Applications on FPGA SoC. - Vu Trung Duong Le; Anh Kiet Pham; Hoai Luan Pham; Tuan Hai Vu 001; Yasuhiko Nakashima (CANDAR, 2024)

Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation. - Van Duy Tran; Tran Xuan Hieu Le; Thi Diem Tran; Hoai Luan Pham; Vu Trung Duong Le; Tuan Hai Vu 001; Van Tinh Nguyen; Yasuhiko Nakashima (CANDARW, 2024)

MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements. - Pham Hoai Luan; Hai Hau Nguyen; Vu Trung Duong Le; Thi Diem Tran; Tuan Hai Vu 001; Thi Hong Tran; Yasuhiko Nakashima (COOL CHIPS, 2024)

A High-Performance FPGA Based on Convolutional Neural Network for QRS Complex Detection. - Binh Tan Ngo; Nghi Hoang Huu Thai; Hoai Luan Pham; Thi Diem Tran (ICCCNT, 2024)

Kyberator: A High-Efficiency FPGA-Based Multi-Mode CRYSTALS-Kyber Accelerator for Quantum-Resistant Security Applications. - Nhat Nguyen Dinh; Hoai Luan Pham; Vu Trung Duong Le; Tuan Hai Vu 001; Van Duy Tran; Yasuhiko Nakashima (ISOCC, 2024)

Quantum Battery Optimization through Quantum Machine Learning Techniques. - Vu Tuan Hai 001; Vo Minh Kiet; Vu Trung Duong Le; Pham Hoai Luan; Le Bin Ho; Yasuhiko Nakashima (ISOCC, 2024)

High-Efficiency RISC-V-Based Cryptographic Coprocessor for Security Applications. - Duc Hong An Le; Vu Trung Duong Le; Viet Anh Ho; Van Tinh Nguyen; Hoai Luan Pham; Van Duy Tran; Tuan Hai Vu 001; Yasuhiko Nakashima (ISOCC, 2024)

UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications. - Vu Trung Duong Le; Hoai Luan Pham; Tuan Hai Vu 001; Van Duy Tran; Thi Diem Tran; Yasuhiko Nakashima (ISOCC, 2024)

CGLA: Coarse-Grained Linear Array for Multi-Hash Acceleration in Blockchain Mining. - Pham Hoai Luan; Vu Trung Duong Le; Van Duy Tran; Tuan Hai Vu 001; Yasuhiko Nakashima (ISOCC, 2024)

LI-RV: A Fast and Efficient RISC-V based Coprocessor for Lightweight Cryptography. - Ngoc Hung Nguyen; Duc Hong An Le; Vu Trung Duong Le; Van Tinh Nguyen; Tuan Hai Vu 001; Hoai Luan Pham; Yasuhiko Nakashima (ISOCC, 2024)

Theoretical Analysis of the Memory-Efficient Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs. - Tran Xuan Hieu Le; Pham Hoai Luan; Vu Tuan Hai 001; Vu Trung Duong Le; Yasuhiko Nakashima (MCSoC, 2024)

Hator: A High-Efficiency CGRA-Based 32/64-Bit Hashing Accelerator with Real-Time Performance Analysis. - Hai Hau Nguyen; Pham Hoai Luan; Tuan Hai Vu 001; Van Duy Tran; Vu Trung Duong Le; Duc Khai Lam; Thi Diem Tran; Yasuhiko Nakashima (MCSoC, 2024)

Efficient Random Quantum Circuit Generator: A Benchmarking Approach for Quantum Simulators. - Vu Tuan Hai 001; Vu Trung Duong Le; Pham Hoai Luan; Yasuhiko Nakashima (RIVF, 2024)

Theoretical Analysis of the Efficient-Memory Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs. - Tran Xuan Hieu Le; Hoai Luan Pham; Tuan Hai Vu 001; Vu Trung Duong Le; Yasuhiko Nakashima (CoRR, 2024)

Flexible and Energy-Efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-Based IoT Applications. - Vu Trung Duong Le; Hoai-Luan Pham; Thi Hong Tran; Yasuhiko Nakashima (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024)

LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography. - Hoai Luan Pham; Vu Trung Duong Le; Van Duy Tran; Tuan Hai Vu 001; Yasuhiko Nakashima (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

UniCrypt: Universal Crypto Engine with Optimized Resource Sharing for Security Applications. - Vu Trung Duong Le; Hoai Luan Pham; Tuan Hai Vu 001; Van Duy Tran; Yasuhiko Nakashima (COOL CHIPS, 2025)

Lifelong Whole Slide Image Analysis: Online Vision-Language Adaptation and Past-to-Present Gradient Distillation. - Doanh C. Bui; Hoai Luan Pham; Vu Trung Duong Le; Tuan Hai Vu 001; Van Duy Tran; Khang Nguyen 001; Yasuhiko Nakashima (IEEE Access, 2025)

FQsun: A Configurable Wave Function-Based Quantum Emulator for Power-Efficient Quantum Simulations. - Tuan Hai Vu 001; Vu Trung Duong Le; Hoai Luan Pham; Quoc Chuong Nguyen; Yasuhiko Nakashima (IEEE Access, 2025)

MRCA 2.0: An Area-Optimized Multigrained Reconfigurable Cryptographic Accelerator for Securing Blockchain-Based Internet of Things Systems. - Hoai Luan Pham; Vu Trung Duong Le; Tuan Hai Vu 001; Van Duy Tran; Van Tinh Nguyen; Thi Diem Tran; Yasuhiko Nakashima (IEEE Micro, 2025)

Benchmarking Variants of the Adam Optimizer for Quantum Machine Learning Applications. - Tuan Hai Vu 001; Vu Trung Duong Le; Hoai Luan Pham; Yasuhiko Nakashima (IEEE Open J. Comput. Soc., 2025)

A Fast Quantum Image Compression Algorithm based on Taylor Expansion. - Vu Tuan Hai 001; Trinh Huynh Ho Thi Mong; Pham Hoai Luan (CoRR, 2025)

ZeroSlide: Is Zero-Shot Classification Adequate for Lifelong Learning in Whole-Slide Image Analysis in the Era of Pathology Vision-Language Foundation Models? - Doanh C. Bui; Hoai Luan Pham; Vu Trung Duong Le; Tuan Hai Vu 001; Van Duy Tran; Yasuhiko Nakashima (CoRR, 2025)

Qimax: Efficient quantum simulation via GPU-accelerated extended stabilizer formalism. - Vu Tuan Hai 001; Doanh C. Bui; Vu Trung Duong Le; Pham Hoai Luan; Yasuhiko Nakashima (CoRR, 2025)

AES-RV: Hardware-Efficient RISC-V Accelerator with Low-Latency AES Instruction Extension for IoT Security. - Van Tinh Nguyen; Phuc Hung Pham; Vu Trung Duong Le; Hoai Luan Pham; Tuan Hai Vu 001; Thi Diem Tran (CoRR, 2025)

CTFE: A High-Efficient Heterogeneous Cryptographic CGRA for Diverse Security Applications. - Vu Trung Duong Le; Hoai Luan Pham; Thi Hong Tran; Van Duy Tran; Tuan Hai Vu 001; Yasuhiko Nakashima (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

MINA: A Hardware-Efficient and Flexible Mini-InceptionNet Accelerator for ECG Classification in Wearable Devices. - Hoai Luan Pham; Thi Diem Tran; Vu Trung Duong Le; Yasuhiko Nakashima (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)