A Precision CMOS Voltage Reference with Enhanced Stability for the Application to Advance VLSIs. - Hoi-Jun Yoo; Seung-Jun Lee; Jeong-Tae Kwon; Wi-Sik Min; Kye-Hwan Oh (ISCAS, 1993)

A study of pipeline architectures for high-speed synchronous DRAMs. - Hoi-Jun Yoo (IEEE J. Solid State Circuits, 1997)

A low-noise folded bit-line sensing architecture for multigigabit DRAM with ultrahigh-density 6F2 cell [CMOS design]. - Jong-Shik Kim; Yu-Soo Choi; Hoi-Jun Yoo; Kwang-Seok Seo (IEEE J. Solid State Circuits, 1998)

One chip-low power digital-TCXO with sub-ppm accuracy. - Se-Joong Lee; Jinho Han; Seung-Ho Hank; Joe-Ho Lee; Jung-Su Kim; Minkyu Je; Hoi-Jun Yoo (ISCAS, 2000)

A 670 ps, 64 bit dynamic low-power adder design. - Ramchan Woo; Se-Joong Lee; Hoi-Jun Yoo (ISCAS, 2000)

Single chip 3D rendering engine integrating embedded DRAM frame buffer and Hierarchical Octet Tree (HOT) array processor with bandwidth amplification. - Yong-Ha Park; Seon-Ho Han; Hoi-Jun Yoo (ASP-DAC, 2001)

Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections. - Jaeseo Lee; Jae-Won Lim; Sung-Jun Song; Sung-Sik Song; Wang-joo Lee; Hoi-Jun Yoo (ISCAS (4), 2001)

A comparative performance analysis of a DDR-SDRAM, a D-RDRAM, and a DDR-FCRAM using a POPeye simulator. - Kangmin Lee; Chi Weon Yoon; Ramchan Woo; Jeong-Hun Kook; Ja-Il Koo; Tae-Sung Jung; Hoi-Jun Yoo (ISCAS (5), 2001)

A 7.1-GB/s low-power rendering engine in 2-D array-embedded memory logic CMOS for portable multimedia system. - Yong-Ha Park; Seon-Ho Han; Junghwan Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2001)

A practical method to use eDRAM in the shared bus packet switch. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (GLOBECOM, 2002)

Optimization of portable system architecture for real-time 3D graphics. - Ju-Ho Sohn; Ramchan Woo; Hoi-Jun Yoo (ISCAS (1), 2002)

Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications. - Yong-Ha Park; Jeonghoon Kook; Hoi-Jun Yoo (ASP-DAC/VLSI Design, 2002)

Race logic architecture (RALA): a novel logic concept using the race scheme of input variables. - Se-Joong Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2002)

A reconfigurable multilevel parallel texture cache memory with 75-GB/s parallel cache replacement bandwidth. - Se-Jeong Park; Jeong-Su Kim; Ramchan Woo; Se-Joong Lee; Kang-Min Lee; Tae-Hum Yang; Jin-Yong Jung; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2002)

A 120-mW 3-D rendering engine with 6-Mb embedded DRAM and 3.2-GB/s runtime reconfigurable bus for PDA chip. - Ramchan Woo; Chi Weon Yoon; Jeonghoon Kook; Se-Joong Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2002)

A distributed crossbar switch scheduler for on-chip networks. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (CICC, 2003)

A high-speed and lightweight on-chip crossbar switch scheduler for on-chip interconnection networks. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (ESSCIRC, 2003)

A 10Gbps/port 8×8 shared bus switch with embedded DRAM hierarchical output buffer. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (ESSCIRC, 2003)

A low power 3D rendering engine with two texture units and 29Mb embedded DRAM for 3G multimedia terminals. - Ramchan Woo; Sungdae Choi; Ju-Ho Sohn; Seong-Jun Song; Hoi-Jun Yoo (ESSCIRC, 2003)

CMOS optical receiver chipset for gigabit Ethernet applications. - Sung-Eun Kim; Seong-Jun Song; Sung Min Park 001; Hoi-Jun Yoo (ISCAS (1), 2003)

A 4-Gb/s CMOS clock and data recovery circuit using 1/8-rate clock technique. - Seong-Jun Song; Sung Min Park 001; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2003)

A low-power graphics LSI integrating 29Mb embedded DRAM for mobile multimedia applications. - Ramchan Woo; Sungdae Choi; Ju-Ho Sohn; Seong-Jun Song; Young-Don Bae; Hoi-Jun Yoo (ASP-DAC, 2004)

A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications. - Ju-Ho Sohn; Ramchan Woo; Hoi-Jun Yoo (Graphics Hardware, 2004)

A small ripple regulated charge pump with automatic pumping control schemes. - Sung-Eun Kim; Seong-Jun Song; Jin Kyung Kim; Sunyoung Kim; Jae-Youl Lee; Hoi-Jun Yoo (ESSCIRC, 2004)

SILENT: serialized low energy transmission coding for on-chip interconnection networks. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (ICCAD, 2004)

On-chip network based embedded core testing. - Jong-Sun Kim; Min-Su Hwang; Seungsu Roh; Ja-Young Lee; Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (SoCC, 2004)

Low energy transmission coding for on-chip serial communications. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (SoCC, 2004)

1-Gb/s 80-dBΩ fully differential CMOS transimpedance amplifier in multichip on oxide technology for optical interconnects. - Sung Min Park 001; Jaeseo Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2004)

1.25-Gb/s regulated cascode CMOS transimpedance amplifier for Gigabit Ethernet applications. - Sung Min Park 001; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2004)

A low-power 3D rendering engine with two texture units and 29-Mb embedded DRAM for 3G multimedia terminals. - Ramchan Woo; Sungdae Choi; Ju-Ho Sohn; Seong-Jun Song; Young-Don Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2004)

A 210-mW graphics LSI implementing full 3-D pipeline with 264 mtexels/s texturing for mobile multimedia applications. - Ramchan Woo; Sungdae Choi; Ju-Ho Sohn; Seong-Jun Song; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2004)

A 5.1-μW UHF RFID tag chip integrated with sensors for wireless environmental monitoring. - Namjun Cho; Seong-Jun Song; Sunyoung Kim; Shiho Kim; Hoi-Jun Yoo (ESSCIRC, 2005)

A fixed-point multimedia coprocessor with 50Mvertices/s programmable SIMD vertex shader for mobile applications. - Ju-Ho Sohn; Jeong-Ho Woo; Ramchan Woo; Hoi-Jun Yoo (ESSCIRC, 2005)

A 8-µW, 0.3-mm2 RF-powered transponder with temperature sensor for wireless environmental monitoring. - Narrijun Cho; Seong-Jun Song; Jae-Youl Lee; Sunyoung Kim; Shiho Kim; Hoi-Jun Yoo (ISCAS (5), 2005)

An arbitration look-ahead scheme for reducing end-to-end latency in networks on chip. - Kwanho Kim; Se-Joong Lee; Kangmin Lee; Hoi-Jun Yoo (ISCAS (3), 2005)

A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip. - Donghyun Kim; Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (ISCAS (3), 2005)

A 0.9-V 67-µW analog front-end using adaptive-SNR technique for digital hearing aid. - Sunyoung Kim; Jae-Youl Lee; Seong-Jun Song; Namjun Cho; Hoi-Jun Yoo (ISCAS (1), 2005)

A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systems. - Min-wuk Lee; Byeong-Gyu Nam; Ju-Ho Sohn; Namjun Cho; Hyejung Kim; Kwanho Kim; Hoi-Jun Yoo (ISCAS (5), 2005)

Low-power 3D graphics processors for mobile terminals. - Ju-Ho Sohn; Yong-Ha Park; Chi Weon Yoon; Ramchan Woo; Se-Jeong Park; Hoi-Jun Yoo (IEEE Commun. Mag., 2005)

Analysis and Implementation of Practical, Cost-Effective Networks on Chips. - Se-Joong Lee; Kangmin Lee; Hoi-Jun Yoo (IEEE Des. Test Comput., 2005)

A 0.7-fJ/bit/search 2.2-ns search time hybrid-type TCAM architecture. - Sungdae Choi; Kyomin Sohn; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2005)

Packet-switched on-chip interconnection network for system-on-chip applications. - Se-Joong Lee; Kangmin Lee; Seong-Jun Song; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

Development of a 3-D graphics rendering engine with lighting acceleration for handheld multimedia systems. - Byeong-Gyu Nam; Min-wuk Lee; Hoi-Jun Yoo (IEEE Trans. Consumer Electron., 2005)

A Multi-Nodes Human Body Communication Sensor Network Control Processor. - Sungdae Choi; Seong-Jun Song; Kyomin Sohn; Hyejung Kim; Joo-Young Kim 001; Namjun Cho; Jeong-Ho Woo; Jerald Yoo; Hoi-Jun Yoo (CICC, 2006)

A network-on-chip with 3Gbps/wire serialized on-chip interconnect using adaptive control schemes. - Se-Joong Lee; Kwanho Kim; Hyejung Kim; Namjun Cho; Hoi-Jun Yoo (DATE, 2006)

Design and test of fixed-point multimedia co-processor for mobile applications. - Ju-Ho Sohn; Jeong-Ho Woo; Jerald Yoo; Hoi-Jun Yoo (DATE Designers' Forum, 2006)

A 372 ps 64-bit adder using fast pull-up logic in 0.18µm CMOS. - Joo-Young Kim 001; Kangmin Lee; Hoi-Jun Yoo (ISCAS, 2006)

A 10µW digital signal processor with adaptive-SNR monitoring for a sub-1V digital hearing aid. - Jerald Yoo; Sunyoung Kim; Namjun Cho; Seong-Jun Song; Hoi-Jun Yoo (ISCAS, 2006)

A 2Mb/s Wideband Pulse Transceiver with Direct-Coupled Interface for Human Body Communications. - Seong-Jun Song; Namjun Cho; Sunyoung Kim; Jerald Yoo; Hoi-Jun Yoo (ISSCC, 2006)

An Ultra Low-Power Body Sensor Network Control Processor with Centralized Node Control. - Sungdae Choi; Kyomin Sohn; Hyejung Kim; Joo-Young Kim 001; Seong-Jun Song; Namjun Cho; Jerald Yoo; Hoi-Jun Yoo (SoC, 2006)

A Low-power Star-topology Body Area Network Controller for Periodic Data Monitoring Around and Inside the Human Body. - Sungdae Choi; Seong-Jun Song; Kyomin Sohn; Hyejung Kim; Joo-Young Kim 001; Jerald Yoo; Hoi-Jun Yoo (ISWC, 2006)

Low Power Wearable Audio Player Using Human Body Communications. - Seong-Jun Song; Seungjin Lee 001; Namjun Cho; Hoi-Jun Yoo (ISWC, 2006)

Chip-package hybrid clock distribution network and DLL for low jitter clock delivery. - Daehyun Chung; Chunghyun Ryu; Hyungsoo Kim; Choonheung Lee; Jinhan Kim; Kicheol Bae; Jiheon Yu; Hoi-Jun Yoo; Joungho Kim (IEEE J. Solid State Circuits, 2006)

An energy-efficient analog front-end circuit for a sub-1-V digital hearing aid chip. - Sunyoung Kim; Jae-Youl Lee; Seong-Jun Song; Namjun Cho; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2006)

A 231-MHz, 2.18-mW 32-bit Logarithmic Arithmetic Unit for Fixed-Point 3-D Graphics System. - Hyejung Kim; Byeong-Gyu Nam; Ju-Ho Sohn; Jeong-Ho Woo; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2006)

A regulated charge pump with small ripple voltage and fast start-up. - Jae-Youl Lee; Sung-Eun Kim; Seong-Jun Song; Jin-Kyung Kim; Sunyoung Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2006)

An autonomous SRAM with on-chip sensors in an 80-nm double stacked cell technology. - Kyomin Sohn; Hyun-Sun Mo; Young-Ho Suh; Hyun-Geun Byun; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2006)

A 155-mW 50-m vertices/s graphics processor with fixed-point programmable vertex shader for mobile applications. - Ju-Ho Sohn; Jeong-Ho Woo; Min-wuk Lee; Hyejung Kim; Ramchan Woo; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2006)

Low-power network-on-chip for high-performance SoC design. - Kangmin Lee; Se-Joong Lee; Hoi-Jun Yoo (IEEE Trans. Very Large Scale Integr. Syst., 2006)

A Low Power Compression Processor for Body Sensor Network System. - Hyejung Kim; Sungdae Choi; Hoi-Jun Yoo (BSN, 2007)

Low Energy On-Body Communication for BSN. - Hoi-Jun Yoo; Seong-Jun Song; Namjun Cho; Hye Jeong Kim (BSN, 2007)

An 81.6 GOPS Object Recognition Processor Based on NoC and Visual Image Processing Memory. - Donghyun Kim 014; Kwanho Kim; Joo-Young Kim 001; Seungjin Lee 001; Hoi-Jun Yoo (CICC, 2007)

A Real-Time Feedback Controlled Hearing Aid Chip with Reference Ear Model. - Sunyoung Kim; Seungjin Lee 001; Namjun Cho; Seong-Jun Song; Hoi-Jun Yoo (CICC, 2007)

An Embedded 8-bit RISC Controller for Yield Enhancement of the 90-nm PRAM. - Hyejung Kim; Kyomin Sohn; Jerald Yoo; Hoi-Jun Yoo (CICC, 2007)

A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains. - Byeong-Gyu Nam; Jeabin Lee; Kwanho Kim; Seungjin Lee 001; Hoi-Jun Yoo (Graphics Hardware, 2007)

Visual image processing RAM for fast 2-D data location search. - Joo-Young Kim 001; Donghyun Kim 014; Seungjin Lee 001; Kwanho Kim; Seonghyun Jeon; Hoi-Jun Yoo (ESSCIRC, 2007)

A low-power vector processor using logarithmic arithmetic for handheld 3d graphics systems. - Byeong-Gyu Nam; Hoi-Jun Yoo (ESSCIRC, 2007)

A Low Power Digital Signal Processor with Adaptive Band Activation for Digital Hearing Aid Chip. - Seungjin Lee 001; Sunyoung Kim; Hoi-Jun Yoo (ISCAS, 2007)

A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling. - Jeabin Lee; Byeong-Gyu Nam; Seong-Jun Song; Namjun Cho; Hoi-Jun Yoo (ISCAS, 2007)

A low power multimedia SoC with fully programmable 3D graphics and MPEG4/H.264/JPEG for mobile devices. - Jeong-Ho Woo; Ju-Ho Sohn; Hyejung Kim; Jongcheol Jeong; Euljoo Jeong; Suk Joong Lee; Hoi-Jun Yoo (ISLPED, 2007)

A 52.4mW 3D Graphics Processor with 141Mvertices/s Vertex Shader and 3 Power Domains of Dynamic Voltage and Frequency Scaling. - Byeong-Gyu Nam; Jeabin Lee; Kwanho Kim; Seungjin Lee 001; Hoi-Jun Yoo (ISSCC, 2007)

A 0.9V 2.6mW Body-Coupled Scalable PHY Transceiver for Body Sensor Applications. - Seong-Jun Song; Namjun Cho; Sunyoung Kim; Jerald Yoo; Sungdae Choi; Hoi-Jun Yoo (ISSCC, 2007)

Solutions for Real Chip Implementation Issues of NoC and Their Application to Memory-Centric NoC. - Donghyun Kim 014; Kwanho Kim; Joo-Young Kim 001; Seungjin Lee 001; Hoi-Jun Yoo (NOCS, 2007)

A 0.9 V 96 µW Fully Operational Digital Hearing Aid Chip. - Sunyoung Kim; Namjun Cho; Seong-Jun Song; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2007)

A Low-Power Unified Arithmetic Unit for Programmable Handheld 3-D Graphics Systems. - Byeong-Gyu Nam; Hyejung Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2007)

A 0.2-mW 2-Mb/s Digital Transceiver Based on Wideband Signaling for Human Body Communications. - Seong-Jun Song; Namjun Cho; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2007)

Body channel communication for low energy BSN/BAN. - Hoi-Jun Yoo; Namjun Cho (APCCAS, 2008)

Analysis of body sensor network using human body as the channel. - Jerald Yoo; Namjun Cho; Hoi-Jun Yoo (BODYNETS, 2008)

Vision platform for mobile intelligent robot based on 81.6 GOPS object recognition processor. - Donghyun Kim 014; Kwanho Kim; Joo-Young Kim 001; Seungjin Lee 001; Hoi-Jun Yoo (DAC, 2008)

A 211 GOPS/W dual-mode real-time object recognition processor with Network-on-Chip. - Kwanho Kim; Joo-Young Kim 001; Seungjin Lee 001; Minsu Kim 004; Hoi-Jun Yoo (ESSCIRC, 2008)

A 0.6pJ/b 3Gb/s/ch transceiver in 0.18 µm CMOS for 10mm on-chip interconnects. - Joonsung Bae; Joo-Young Kim 001; Hoi-Jun Yoo (ISCAS, 2008)

A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor. - Hyejung Kim; Yongsang Kim; Hoi-Jun Yoo (ISCAS, 2008)

A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection. - Seulki Lee 001; Jerald Yoo; Hoi-Jun Yoo (ISCAS, 2008)

A 60kb/s-to-10Mb/s 0.37nJ/b Adaptive-Frequency-Hopping Transceiver for Body-Area Network. - Namjun Cho; Jeabin Lee; Long Yan; Joonsung Bae; Sunyoung Kim; Hoi-Jun Yoo (ISSCC, 2008)

A 1.12mW Continuous Healthcare Monitor Chip Integrated on a Planar Fashionable Circuit Board. - Hyejung Kim; Yongsang Kim; Young-Se Kwon; Hoi-Jun Yoo (ISSCC, 2008)

A 125GOPS 583mW Network-on-Chip Based Parallel Processor with Bio-inspired Visual-Attention Engine. - Kwanho Kim; Seungjin Lee 001; Joo-Young Kim 001; Minsu Kim 004; Donghyun Kim 014; Jeong-Ho Woo; Hoi-Jun Yoo (ISSCC, 2008)

Cost-effective low-power graphics processing unit for handheld devices. - Byeong-Gyu Nam; Jeabin Lee; Kwanho Kim; Seungjin Lee 001; Hoi-Jun Yoo (IEEE Commun. Mag., 2008)

A Fully Integrated Digital Hearing Aid Chip With Human Factors Considerations. - Sunyoung Kim; Seungjin Lee 001; Namjun Cho; Seong-Jun Song; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2008)

A 195 mW/152 mW Mobile Multimedia SoC With Fully Programmable 3-D Graphics and MPEG4/H.264/JPEG. - Jeong-Ho Woo; Ju-Ho Sohn; Hyejung Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2008)

A 195 mW, 9.1 MVertices/s Fully Programmable 3-D Graphics Processor for Low-Power Mobile Devices. - Jeong-Ho Woo; Ju-Ho Sohn; Hyejung Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2008)

Power and Area-Efficient Unified Computation of Vector and Elementary Functions for Handheld 3D Graphics Systems. - Byeong-Gyu Nam; Hyejung Kim; Hoi-Jun Yoo (IEEE Trans. Computers, 2008)

A Wearable Fabric Computer by Planar-Fashionable Circuit Board Technique. - Hyejung Kim; Yongsang Kim; Binhee Kim; Hoi-Jun Yoo (BSN, 2009)

A 54GOPS 51.8mW analog-digital mixed mode Neural Perception Engine for fast object detection. - Minsu Kim 004; Joo-Young Kim 001; Seungjin Lee 001; Jinwook Oh; Hoi-Jun Yoo (CICC, 2009)

A 118.4GB/s multi-casting network-on-chip for real-time object recognition processor. - Joo-Young Kim 001; Kwanho Kim; Seungjin Lee 001; Minsu Kim 004; Jinwook Oh; Hoi-Jun Yoo (ESSCIRC, 2009)

An Energy-efficient Dual Sampling SAR ADC with Reduced Capacitive DAC. - Binhee Kim; Long Yan; Jerald Yoo; Namjun Cho; Hoi-Jun Yoo (ISCAS, 2009)

A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management. - Joo-Young Kim 001; Seungjin Lee 001; Jinwook Oh; Minsu Kim 004; Hoi-Jun Yoo (ISLPED, 2009)

A 10.8mW body-channel-communication/MICS dual-band transceiver for a unified body-sensor-network controller. - Namjun Cho; Joonsung Bae; Sunyoung Kim; Hoi-Jun Yoo (ISSCC, 2009)

A 201.4GOPS 496mW real-time multi-object recognition processor with bio-inspired neural perception engine. - Joo-Young Kim 001; Minsu Kim 004; Seungjin Lee 001; Jinwook Oh; Kwanho Kim; Sejong Oh; Jeong-Ho Woo; Donghyun Kim 014; Hoi-Jun Yoo (ISSCC, 2009)

A 5.2mW self-configured wearable body sensor network controller and a 12µW 54.9% efficiency wirelessly powered sensor for continuous health monitoring system. - Jerald Yoo; Long Yan; Seulki Lee 001; Yongsang Kim; Hyejung Kim; Binhee Kim; Hoi-Jun Yoo (ISSCC, 2009)

An Attachable ECG Sensor Bandage with Planar-Fashionable Circuit Board. - Jerald Yoo; Long Yan; Seulki Lee 001; Hyejung Kim; Binhee Kim; Hoi-Jun Yoo (ISWC, 2009)

A wearable inductor channel design for blood pressure monitoring system in daily life. - Seulki Lee 001; Jerald Yoo; Hoi-Jun Yoo (PervasiveHealth, 2009)

A Low-Power Multimedia SoC with Fully Programmable 3D Graphics for Mobile Devices. - Jeong-Ho Woo; Ju-Ho Sohn; Hyejung Kim; Hoi-Jun Yoo (IEEE Computer Graphics and Applications, 2009)

Memory-centric network-on-chip for power efficient execution of task-level pipeline on a multi-core processor. - Donghyun Kim 014; Kwanho Kim; Joo-Young Kim 001; Seungjin Lee 001; Hoi-Jun Yoo (IET Comput. Digit. Tech., 2009)

A 10.8 mW Body Channel Communication/MICS Dual-Band Transceiver for a Unified Body Sensor Network Controller. - Namjun Cho; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2009)

A 60 kb/s-10 Mb/s Adaptive Frequency Hopping Transceiver for Interference-Resilient Body Channel Communication. - Namjun Cho; Long Yan; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2009)

A 125 GOPS 583 mW Network-on-Chip Based Parallel Processor With Bio-Inspired Visual Attention Engine. - Kwanho Kim; Seungjin Lee 001; Joo-Young Kim 001; Minsu Kim 004; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2009)

An Embedded Stream Processor Core Based on Logarithmic Arithmetic for a Low-Power 3-D Graphics SoC. - Byeong-Gyu Nam; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2009)

Introduction to the Special Section on the 2008 Asian Solid-State Circuits Conference (A-SSCC'08). - Hoi-Jun Yoo; SeongHwan Cho (IEEE J. Solid State Circuits, 2009)

A 1.12 pJ/b Inductive Transceiver With a Fault-Tolerant Network Switch for Multi-Layer Wearable Body Area Network Applications. - Jerald Yoo; Seulki Lee 001; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2009)

Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-Aware Task Pipelining. - Joo-Young Kim 001; Minsu Kim 004; Seungjin Lee 001; Jinwook Oh; Sejong Oh; Hoi-Jun Yoo (IEEE Micro, 2009)

A 200-Mbps 0.02-nJ/b Dual-Mode Inductive Coupling Transceiver for cm-Range Multimedia Application. - Seulki Lee 001; Jerald Yoo; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A Configurable Heterogeneous Multicore Architecture With Cellular Neural Network for Real-Time Object Recognition. - Kwanho Kim; Seungjin Lee 001; Joo-Young Kim 001; Minsu Kim 004; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. Video Technol., 2009)

A Wearable ECG Acquisition System With Compact Planar-Fashionable Circuit Board-Based Shirt. - Jerald Yoo; Long Yan; Seulki Lee 001; Hyejung Kim; Hoi-Jun Yoo (IEEE Trans. Inf. Technol. Biomed., 2009)

81.6 GOPS Object Recognition Processor Based on a Memory-Centric NoC. - Donghyun Kim 014; Kwanho Kim; Joo-Young Kim 001; Seungjin Lee 001; Se-Joong Lee; Hoi-Jun Yoo (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A 152-mW Mobile Multimedia SoC With Fully Programmable 3-D Graphics and MPEG4/H.264/JPEG. - Jeong-Ho Woo; Ju-Ho Sohn; Hyejung Kim; Hoi-Jun Yoo (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A combined method to reduce motion artifact and power line interference for wearable healthcare systems. - Sunjoo Hong; Kiseok Song; Long Yan; Hoi-Jun Yoo (APCCAS, 2010)

A 60µW 10Mb/s fully digital FSK demodulator for power-jitter efficient medical BAN. - Hyungwoo Lee; Taehwan Roh; Joonsung Bae; Hoi-Jun Yoo (APCCAS, 2010)

Intelligent NoC with neuro-fuzzy bandwidth regulation for a 51 IP object recognition processor. - Seungjin Lee 001; Jinwook Oh; Minsu Kim 004; Junyoung Park 002; Joonsoo Kwon; Joo-Young Kim 001; Hoi-Jun Yoo (CICC, 2010)

A 22.4 mW competitive fuzzy edge detection processor for volume rendering. - Joonsoo Kwon; Minsu Kim 004; Jinwook Oh; Hoi-Jun Yoo (ISCAS, 2010)

Live demonstration: A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board. - Seulki Lee 001; Seungwook Paek; Hoi-Jun Yoo (ISCAS, 2010)

A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board. - Seulki Lee 001; Seungwook Paek; Hoi-Jun Yoo (ISCAS, 2010)

A 30fps stereo matching processor based on belief propagation with disparity-parallel PE array architecture. - Junyoung Park 002; Seungjin Lee 001; Hoi-Jun Yoo (ISCAS, 2010)

A lOMb/s 4ns jitter direct conversion low Modulation Index FSK demodulator for low-energy body sensor network. - Taehwan Roh; Joonsung Bae; Hoi-Jun Yoo (ISCAS, 2010)

A wirelessly-powered electro-acupuncture based on Adaptive Pulse Width Mono-Phase stimulation. - Kiseok Song; Seulki Lee 001; Hoi-Jun Yoo (ISCAS, 2010)

A 345mW heterogeneous many-core processor with an intelligent inference engine for robust object recognition. - Seungjin Lee 001; Jinwook Oh; Minsu Kim 004; Junyoung Park 002; Joonsoo Kwon; Hoi-Jun Yoo (ISSCC, 2010)

A 3.9mW 25-electrode reconfigured thoracic impedance/ECG SoC with body-channel transponder. - Long Yan; Joonsung Bae; Seulki Lee 001; Binhee Kim; Taehwan Roh; Kiseok Song; Hoi-Jun Yoo (ISSCC, 2010)

Arm-band type textile-MP3 player with multi-layer Planar Fashionable Circuit Board (P-FCB) techniques. - Seulki Lee 001; Binhee Kim; Taehwan Roh; Sunjoo Hong; Hoi-Jun Yoo (ISWC, 2010)

Message from technical program co-chairs. - Hoi-Jun Yoo; Kristof Van Laerhoven (ISWC, 2010)

A smart poultice with reconfigurable sensor array for wearable cardiac healthcare. - Long Yan; Hoi-Jun Yoo (PervasiveHealth, 2010)

A 4.78 µs Dynamic Compensated Inductive Coupling Transceiver for Ubiquitous and Wearable Body Sensor Network. - Seulki Lee 001; Jerald Yoo; Hoi-Jun Yoo (IEICE Trans. Commun., 2010)

A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception Engine. - Joo-Young Kim 001; Minsu Kim 004; Seungjin Lee 001; Jinwook Oh; Kwanho Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2010)

A 118.4 GB/s Multi-Casting Network-on-Chip With Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition. - Joo-Young Kim 001; Junyoung Park 002; Seungjin Lee 001; Minsu Kim 004; Jinwook Oh; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2010)

A Low-Energy Inductive Coupling Transceiver With Cm-Range 50-Mbps Data Communication in Mobile Device Applications. - Seulki Lee 001; Kiseok Song; Jerald Yoo; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2010)

A 0.5-μ Vrms 12-μ W Wirelessly Powered Patch-Type Healthcare Sensor for Wearable Body Sensor Network. - Long Yan; Jerald Yoo; Binhee Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2010)

A 5.2 mW Self-Configured Wearable Body Sensor Network Controller and a 12 μ W Wirelessly Powered Sensor for a Continuous Health Monitoring System. - Jerald Yoo; Long Yan; Seulki Lee 001; Yongsang Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2010)

Familiarity based unified visual attention model for fast and robust object recognition. - Seungjin Lee 001; Kwanho Kim; Joo-Young Kim 001; Minsu Kim 004; Hoi-Jun Yoo (Pattern Recognit., 2010)

An attention controlled multi-core architecture for energy efficient object recognition. - Joo-Young Kim 001; Sejong Oh; Seungjin Lee 001; Minsu Kim 004; Jinwook Oh; Hoi-Jun Yoo (Signal Process. Image Commun., 2010)

Guest Editorial - Selected Papers From the 2010 IEEE International Solid-State Circuits Conference (ISSCC). - Anas A. Hamoui; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2010)

Visual Image Processing RAM: Memory Architecture With 2-D Data Location Search and Data Consistency Management for a Multicore Object Recognition Processor. - Joo-Young Kim 001; Donghyun Kim 014; Seungjin Lee 001; Kwanho Kim; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. Video Technol., 2010)

ECG signal compression and classification algorithm with quad level vector for ECG holter system. - Hyejung Kim; Refet Firat Yazicioglu; Patrick Merken; Chris Van Hoof; Hoi-Jun Yoo (IEEE Trans. Inf. Technol. Biomed., 2010)

A low energy crystal-less double-FSK transceiver for wireless body-area-network. - Joonsung Bae; Kiseok Song; Hyungwoo Lee; Hyunwoo Cho; Hoi-Jun Yoo (A-SSCC, 2011)

An asynchronous mixed-mode neuro-fuzzy controller for energy efficient machine intelligence SoC. - Jinwook Oh; Gyeonghoon Kim; Hoi-Jun Yoo (A-SSCC, 2011)

A 92mW real-time traffic sign recognition system with robust light and dark adaptation. - Junyoung Park 002; Joonsoo Kwon; Jinwook Oh; Seungjin Lee 001; Hoi-Jun Yoo (A-SSCC, 2011)

A 20 µW contact impedance sensor for wireless body-area-network transceiver. - Kiseok Song; Joonsung Bae; Long Yan; Hoi-Jun Yoo (CICC, 2011)

The Smart Patches and Wearable Band (W-Band) for comfortable sleep monitoring system. - Seulki Lee 001; Long Yan; Taehwan Roh; Sunjoo Hong; Hoi-Jun Yoo (EMBC, 2011)

Fabric circuit board-based dry electrode and its characteristics for long-term physiological signal recording. - Jerald Yoo; Hoi-Jun Yoo (EMBC, 2011)

A 145µW 8×8 parallel multiplier based on optimized bypassing architecture. - Sunjoo Hong; Taehwan Roh; Hoi-Jun Yoo (ISCAS, 2011)

A low-energy hybrid radix-4/-8 multiplier for portable multimedia applications. - Gyeonghoon Kim; Seungjin Lee 001; Junyoung Park 002; Hoi-Jun Yoo (ISCAS, 2011)

A 2.4µW 400nC/s constant charge injector for wirelessly-powered electro-acupuncture. - Hyungwoo Lee; Kiseok Song; Long Yan; Hoi-Jun Yoo (ISCAS, 2011)

A 0.24nJ/b wireless body-area-network transceiver with scalable double-FSK modulation. - Joonsung Bae; Kiseok Song; Hyungwoo Lee; Hyunwoo Cho; Long Yan; Hoi-Jun Yoo (ISSCC, 2011)

A 75μW real-time scalable network controller and a 25μW ExG sensor IC for compact sleep-monitoring applications. - Seulki Lee 001; Long Yan; Taehwan Roh; Sunjoo Hong; Hoi-Jun Yoo (ISSCC, 2011)

A 57mW embedded mixed-mode neuro-fuzzy accelerator for intelligent multi-core processor. - Jinwook Oh; Junyoung Park 002; Gyeonghoon Kim; Seungjin Lee 001; Hoi-Jun Yoo (ISSCC, 2011)

Body area network: Technology, solutions, and standardization. - Hoi-Jun Yoo; Alison J. Burdett (ISSCC, 2011)

A Low Energy Injection-Locked FSK Transceiver With Frequency-to-Amplitude Conversion for Body Sensor Applications. - Joonsung Bae; Long Yan; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2011)

A 345 mW Heterogeneous Many-Core Processor With an Intelligent Inference Engine for Robust Object Recognition. - Seungjin Lee 001; Jinwook Oh; Junyoung Park 002; Joonsoo Kwon; Minsu Kim 004; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2011)

A 3.9 mW 25-Electrode Reconfigured Sensor for Wearable Cardiac Monitoring System. - Long Yan; Joonsung Bae; Seulki Lee 001; Taehwan Roh; Kiseok Song; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2011)

A Wirelessly Powered Electro-Acupuncture Based on Adaptive Pulsewidth Monophase Stimulation. - Kiseok Song; Long Yan; Seulki Lee 001; Jerald Yoo; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2011)

24-GOPS 4.5-mm2 Digital Cellular Neural Network for Rapid Visual Attention in an Object-Recognition SoC. - Seungjin Lee 001; Minsu Kim 004; Kwanho Kim; Joo-Young Kim 001; Hoi-Jun Yoo (IEEE Trans. Neural Networks, 2011)

Low Power Bio-Medical DSP. - Hyejung Kim; Hoi-Jun Yoo (Bio-Medical CMOS ICs, 2011)

Digital Hearing Aid and Cochlear Implant. - Sunyoung Kim; Hoi-Jun Yoo (Bio-Medical CMOS ICs, 2011)

Body Channel Communication for Energy-Efficient BAN. - Seong-Jun Song; Hoi-Jun Yoo (Bio-Medical CMOS ICs, 2011)

Introduction to Bio-Medical CMOS IC. - Hoi-Jun Yoo; Chris Van Hoof (Bio-Medical CMOS ICs, 2011)

Wearable Healthcare System. - Jerald Yoo; Hoi-Jun Yoo (Bio-Medical CMOS ICs, 2011)

Live demonstration: Wearable mental health monitoring system with planar-fashonable circuit board. - Taehwan Roh; Kyungryul Bong; Sunjoo Hong; Hyunwoo Cho; Hoi-Jun Yoo (BioCAS, 2012)

Compact electro-acupuncture system for multi-modal feedback stimulation. - Kiseok Song; Hyungwoo Lee; Sunjoo Hong; Hyunwoo Cho; Kwonjoon Lee; Hoi-Jun Yoo (BioCAS, 2012)

A 46 μW motion artifact reduction bio-signal sensor with ICA based adaptive DC level control for sleep monitoring system. - Sunjoo Hong; Seulki Lee 001; Taehwan Roh; Hoi-Jun Yoo (CICC, 2012)

Online Reinforcement Learning NoC for portable HD object recognition processor. - Junyoung Park 002; Injoon Hong; Gyeonghoon Kim; Jinwook Oh; Seungjin Lee 001; Hoi-Jun Yoo (CICC, 2012)

A simultaneous multithreading heterogeneous object recognition processor with machine learning based dynamic resource management. - Jinwook Oh; Gyeonghoon Kim; Junyoung Park 002; Injoon Hong; Seungjin Lee 001; Joo-Young Kim 001; Hoi-Jun Yoo (COOL Chips, 2012)

Wearable mental-health monitoring platform with independent component analysis and nonlinear chaotic analysis. - Taehwan Roh; Kyeongryeol Bong; Sunjoo Hong; Hyunwoo Cho; Hoi-Jun Yoo (EMBC, 2012)

The compact electro-acupuncture system for multi-modal feedback electro-acupuncture treatment. - Kiseok Song; Hyungwoo Lee; Sunjoo Hong; Hyunwoo Cho; Hoi-Jun Yoo (EMBC, 2012)

A 86mW 98GOPS ANN-searching processor for Full-HD 30fps video object recognition with zeroless locality-sensitive hashing. - Gyeonghoon Kim; Jinwook Oh; Hoi-Jun Yoo (ESSCIRC, 2012)

A 39 µW body channel communication wake-up receiver with injection-locking ring-oscillator for wireless body area network. - Hyunwoo Cho; Joonsung Bae; Hoi-Jun Yoo (ISCAS, 2012)

A 2.1µW real-time reconfigurable wearable BAN controller with dual linked list structure. - Seulki Lee 001; Taehwan Roh; Sunjoo Hong; Hoi-Jun Yoo (ISCAS, 2012)

Bioelectronics for sustainable healthcare. - Chris Van Hoof; Wim Dehaene; Wentai Liu; Timothy Denison; Minkyu Je; Hoi-Jun Yoo (ISSCC, 2012)

A 320mW 342GOPS real-time moving object recognition processor for HD 720p video streams. - Jinwook Oh; Gyeonghoon Kim; Junyoung Park 002; Injoon Hong; Seungjin Lee 001; Hoi-Jun Yoo (ISSCC, 2012)

A 259.6μW nonlinear HRV-EEG chaos processor with body channel communication interface for mental health monitoring. - Taehwan Roh; Sunjoo Hong; Hyunwoo Cho; Hoi-Jun Yoo (ISSCC, 2012)

A sub-10nA DC-balanced adaptive stimulator IC with multimodal sensor for compact electro-acupuncture system. - Kiseok Song; Hyungwoo Lee; Sunjoo Hong; Hyunwoo Cho; Hoi-Jun Yoo (ISSCC, 2012)

An 8-channel scalable EEG acquisition SoC with fully integrated patient-specific seizure classification and recording processor. - Jerald Yoo; Long Yan; Dina El-Damak; Muhammad Bin Altaf; Ali H. Shoeb; Hoi-Jun Yoo; Anantha P. Chandrakasan (ISSCC, 2012)

Guest Editorial Emerging Circuits and Systems Techniques for Ultra-Low Power Body Sensor Networks. - Benton H. Calhoun; Anantha P. Chandrakasan; Brian P. Otis; Naveen Verma; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

A 0.24-nJ/b Wireless Body-Area-Network Transceiver With Scalable Double-FSK Modulation. - Joonsung Bae; Kiseok Song; Hyungwoo Lee; Hyunwoo Cho; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2012)

A Low-Energy Crystal-Less Double-FSK Sensor Node Transceiver for Wireless Body-Area Network. - Joonsung Bae; Kiseok Song; Hyungwoo Lee; Hyunwoo Cho; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2012)

A 75 µ W Real-Time Scalable Body Area Network Controller and a 25 µW ExG Sensor IC for Compact Sleep Monitoring Applications. - Seulki Lee 001; Long Yan; Taehwan Roh; Sunjoo Hong; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2012)

A 92-mW Real-Time Traffic Sign Recognition System With Robust Illumination Adaptation and Support Vector Machine. - Junyoung Park 002; Joonsoo Kwon; Jinwook Oh; Seungjin Lee 001; Joo-Young Kim 001; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2012)

Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems. - Jinwook Oh; Gyeonghoon Kim; Injoon Hong; Junyoung Park 002; Seungjin Lee 001; Joo-Young Kim 001; Jeong-Ho Woo; Hoi-Jun Yoo (IEEE Micro, 2012)

A Sub-10 nA DC-Balanced Adaptive Stimulator IC With Multi-Modal Sensor for Compact Electro-Acupuncture Stimulation. - Kiseok Song; Hyungwoo Lee; Sunjoo Hong; Hyunwoo Cho; Unsoo Ha; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2012)

Bio-feedback iontophoresis patch for controllable transdermal drug delivery. - Kiseok Song; Unsoo Ha; Jaehyuk Lee; Hoi-Jun Yoo (BioCAS, 2013)

A multi-granularity parallelism object recognition processor with content-aware fine-grained task scheduling. - Junyoung Park 002; Injoon Hong; Gyeonghoon Kim; Youchang Kim; Kyuho Lee 001; Seongwook Park; Kyeongryeol Bong; Hoi-Jun Yoo (COOL Chips, 2013)

A high-throughput 16× super resolution processor for real-time object recognition SoC. - Junyoung Park 002; Byeong-Gyu Nam; Hoi-Jun Yoo (ESSCIRC, 2013)

A 0.7pJ/bit 2Gbps self-synchronous serial link receiver using gated-ring oscillator for inductive coupling communication. - Unsoo Ha; Hyunwoo Cho; Hoi-Jun Yoo (ISCAS, 2013)

A 34.1fps scale-space processor with two-dimensional cache for real-time object recognition. - Youchang Kim; Junyoung Park 002; Hoi-Jun Yoo (ISCAS, 2013)

A multi-modal and tunable Radial-Basis-Funtion circuit with supply and temperature compensation. - Kyuho Lee 001; Junyoung Park 002; Gyeonghoon Kim; Injoon Hong; Hoi-Jun Yoo (ISCAS, 2013)

A 32.8mW 60fps cortical vision processor for spatio-temporal action recognition. - Seongwook Park; Junyoung Park 002; Injoon Hong; Hoi-Jun Yoo (ISCAS, 2013)

1.2Gb/s 3.9pJ/b mono-phase pulse-modulation inductive-coupling transceiver for mm-range board-to-board communication. - Hyunwoo Cho; Unsoo Ha; Taehwan Roh; Dongchurl Kim; Jeahyuck Lee; Yunje Oh; Hoi-Jun Yoo (ISSCC, 2013)

A 5.5mW IEEE-802.15.6 wireless body-area-network standard transceiver for multichannel electro-acupuncture application. - Hyungwoo Lee; Kwonjoon Lee; Sunjoo Hong; Kiseok Song; Taehwan Roh; Joonsung Bae; Hoi-Jun Yoo (ISSCC, 2013)

A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition. - Junyoung Park 002; Injoon Hong; Gyeonghoon Kim; Youchang Kim; Kyuho Lee 001; Seongwook Park; Kyeongryeol Bong; Hoi-Jun Yoo (ISSCC, 2013)

An 87mA·min iontophoresis controller IC with dual-mode impedance sensor for patch-type transdermal drug delivery system. - Kiseok Song; Unsoo Ha; Jaehyuk Lee; Kyeongryeol Bong; Hoi-Jun Yoo (ISSCC, 2013)

An 86 mW 98GOPS ANN-Searching Processor for Full-HD 30 fps Video Object Recognition With Zeroless Locality-Sensitive Hashing. - Gyeonghoon Kim; Jinwook Oh; Seungjin Lee 001; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2013)

A 57 mW 12.5 µJ/Epoch Embedded Mixed-Mode Neuro-Fuzzy Processor for Mobile Real-Time Object Recognition. - Jinwook Oh; Gyeonghoon Kim; Byeong-Gyu Nam; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2013)

A 320 mW 342 GOPS Real-Time Dynamic Object Recognition Processor for HD 720p Video Streams. - Jinwook Oh; Gyeonghoon Kim; Junyoung Park 002; Injoon Hong; Seungjin Lee 001; Joo-Young Kim 001; Jeong-Ho Woo; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2013)

Low Power and Self-Reconfigurable WBAN Controller for Continuous Bio-Signal Monitoring System. - Seulki Lee 001; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2013)

A 37.5 µW Body Channel Communication Wake-Up Receiver With Injection-Locking Ring Oscillator for Wireless Body Area Network. - Hyunwoo Cho; Joonsung Bae; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

1.2-mW Online Learning Mixed-Mode Intelligent Inference Engine for Low-Power Real-Time Object Recognition Processor. - Jinwook Oh; Seungjin Lee 001; Hoi-Jun Yoo (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A 5.2mW IEEE 802.15.6 HBC standard compatible transceiver with power efficient delay-locked-loop based BPSK demodulator. - Hyunwoo Cho; Hyungwoo Lee; Joonsung Bae; Hoi-Jun Yoo (A-SSCC, 2014)

A 27mW reconfigurable marker-less logarithmic camera pose estimation engine for mobile augmented reality processor. - Injoon Hong; Gyeonghoon Kim; Youchang Kim; Donghyun Kim; Byeong-Gyu Nam; Hoi-Jun Yoo (A-SSCC, 2014)

A 4.9 mW neural network task scheduler for congestion-minimized network-on-chip in multi-core systems. - Youchang Kim; Gyeonghoon Kim; Injoon Hong; Donghyun Kim; Hoi-Jun Yoo (A-SSCC, 2014)

Energy-efficient Mixed-mode support vector machine processor with analog Gaussian kernel. - Kyeongryeol Bong; Gyeonghoon Kim; Hoi-Jun Yoo (CICC, 2014)

A 33μW/node Duty Cycle Controlled HBC Transceiver system for medical BAN with 64 sensor nodes. - Hyungwoo Lee; Hyunwoo Cho; Hoi-Jun Yoo (CICC, 2014)

A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler. - Gyeonghoon Kim; Seongwook Park; Kyuho Lee 001; Youchang Kim; Injoon Hong; Kyeongryeol Bong; Dongjoo Shin; Sungpill Choi; Junyoung Park 002; Hoi-Jun Yoo (COOL Chips, 2014)

Wearable depression monitoring system with heart-rate variability. - Taehwan Roh; Sunjoo Hong; Hoi-Jun Yoo (EMBC, 2014)

A 1.5nJ/pixel super-resolution enhanced FAST corner detection processor for high accuracy AR. - Seongwook Park; Gyeonghoon Kim; Junyoung Park 002; Hoi-Jun Yoo (ESSCIRC, 2014)

An 1.61mW mixed-signal column processor for BRISK feature extraction in CMOS image sensor. - Kyeongryeol Bong; Gyeonghoon Kim; Injoon Hong; Hoi-Jun Yoo (ISCAS, 2014)

3.8 mW electrocardiogram (ECG) filtered electrical impedance tomography IC using I/Q homodyne architecture for breast cancer diagnosis. - Yongsu Lee; Unsoo Ha; Kiseok Song; Hoi-Jun Yoo (ISCAS, 2014)

An 1.92mW Feature Reuse Engine based on inter-frame similarity for low-power object recognition in video frames. - Dongjoo Shin; Injoon Hong; Hoi-Jun Yoo (ISCAS, 2014)

18.4 A 4.9mΩ-sensitivity mobile electrical impedance tomography IC for early breast-cancer detection system. - Sunjoo Hong; Kwonjoon Lee; Unsoo Ha; Hyunki Kim; Yongsu Lee; Youchang Kim; Hoi-Jun Yoo (ISSCC, 2014)

10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications. - Gyeonghoon Kim; Youchang Kim; Kyuho Lee 001; Seongwook Park; Injoon Hong; Kyeongryeol Bong; Dongjoo Shin; Sungpill Choi; Jinwook Oh; Hoi-Jun Yoo (ISSCC, 2014)

18.5 A 2.14mW EEG neuro-feedback processor with transcranial electrical stimulation for mental-health management. - Taehwan Roh; Kiseok Song; Hyunwoo Cho; Dongjoo Shin; Unsoo Ha; Kwonjoon Lee; Hoi-Jun Yoo (ISSCC, 2014)

A Vocabulary Forest-based object matching processor with 2.07M-vec/s throughput and 13.3nJ/vector energy in full-HD resolution. - Kyuho Lee 001; Gyeonghoon Kim; Junyoung Park 002; Hoi-Jun Yoo (VLSIC, 2014)

An impedance and multi-wavelength near-infrared spectroscopy IC for non-invasive blood glucose estimation. - Kiseok Song; Unsoo Ha; Seongwook Park; Hoi-Jun Yoo (VLSIC, 2014)

An 87-mA · min Iontophoresis Controller IC With Dual-Mode Impedance Sensor for Patch-Type Transdermal Drug Delivery System. - Kiseok Song; Unsoo Ha; Jaehyuk Lee; Kyeongryeol Bong; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2014)

An Augmented Reality Processor with a Congestion-Aware Network-on-Chip Scheduler. - Gyeonghoon Kim; Donghyun Kim; Seongwook Park; Youchang Kim; Kyuho Lee 001; Injoon Hong; Kyeongryeol Bong; Hoi-Jun Yoo (IEEE Micro, 2014)

A Wearable Neuro-Feedback System With EEG-Based Mental Status Monitoring and Transcranial Electrical Stimulation. - Taehwan Roh; Kiseok Song; Hyunwoo Cho; Dongjoo Shin; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2014)

Intelligent Network-on-Chip With Online Reinforcement Learning for Portable HD Object Recognition Processor. - Junyoung Park 002; Injoon Hong; Gyeonghoon Kim; Byeong-Gyu Nam; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A 1.9nJ/pixel embedded deep neural network processor for high speed visual attention in a mobile vision recognition SoC. - Injoon Hong; Seongwook Park; Junyoung Park 002; Hoi-Jun Yoo (A-SSCC, 2015)

A 95% accurate EEG-connectome processor for a mental health monitoring system. - Hyunki Kim; Kiseok Song; Taehwan Roh; Hoi-Jun Yoo (A-SSCC, 2015)

A keypoint-level parallel pipelined object recognition processor with gaze activation image sensor for mobile smart glasses system. - Injoon Hong; Dongjoo Shin; Youchang Kim; Kyeongryeol Bong; Seongwook Park; Kyuho Lee 001; Hoi-Jun Yoo (COOL Chips, 2015)

A multimodal stress monitoring system with canonical correlation analysis. - Unsoo Ha; Changhyeon Kim; Yongsu Lee; Hyunki Kim; Taehwan Roh; Hoi-Jun Yoo (EMBC, 2015)

Wearable lung-health monitoring system with electrical impedance tomography. - Sunjoo Hong; Jaehyuk Lee; Hoi-Jun Yoo (EMBC, 2015)

Intelligent task scheduler with high throughput NoC for real-time mobile object recognition SoC. - Kyuho Lee 001; Junyoung Park 002; Injoon Hong; Hoi-Jun Yoo (ESSCIRC, 2015)

A low-power and real-time augmented reality processor for the next generation smart glasses. - Gyeonghoon Kim; Hoi-Jun Yoo (Hot Chips Symposium, 2015)

K-glass: Real-time markerless augmented reality smart glasses platform. - Gyeonghoon Kim; Sungpill Choi; Hoi-Jun Yoo (ICIT, 2015)

A 124.9fps memory-efficient hand segmentation processor for hand gesture in mobile devices. - Sungpill Choi; Seongwook Park; Gyeonghoon Kim; Hoi-Jun Yoo (ISCAS, 2015)

A 0.54-mW duty controlled RSSI with current reusing technique for human body communication. - Jaeeun Jang; Yongsu Lee; Hyunwoo Cho; Hoi-Jun Yoo (ISCAS, 2015)

A 24-mW 28-Gb/s wireline receiver with low-frequency equalizing CTLE and 2-tap speculative DFE. - Minseo Kim; Joonsung Bae; Unsoo Ha; Hoi-Jun Yoo (ISCAS, 2015)

A 3.13nJ/sample energy-efficient speech extraction processor for robust speech recognition in mobile head-mounted display systems. - Jinmook Lee; Seongwook Park; Injoon Hong; Hoi-Jun Yoo (ISCAS, 2015)

Session 1 overview: Plenary session. - Anantha P. Chandrakasan; Hoi-Jun Yoo (ISSCC, 2015)

21.1 A 79pJ/b 80Mb/s full-duplex transceiver and a 42.5μW 100kb/s super-regenerative transceiver for body channel communication. - Hyunwoo Cho; Hyunki Kim; Minseo Kim; Jaeeun Jang; Joonsung Bae; Hoi-Jun Yoo (ISSCC, 2015)

21.9 A wearable EEG-HEG-HRV multimodal system with real-time tES monitoring for mental health management. - Unsoo Ha; Yongsu Lee; Hyunki Kim; Taehwan Roh; Joonsung Bae; Changhyeon Kim; Hoi-Jun Yoo (ISSCC, 2015)

18.1 A 2.71nJ/pixel 3D-stacked gaze-activated object-recognition system for low-power mobile HMD applications. - Injoon Hong; Kyeongryeol Bong; Dongjoo Shin; Seongwook Park; Kyuho Lee 001; Youchang Kim; Hoi-Jun Yoo (ISSCC, 2015)

18.3 A 0.5V 54μW ultra-low-power recognition processor with 93.5% accuracy geometric vocabulary tree and 47.5% database compression. - Youchang Kim; Injoon Hong; Hoi-Jun Yoo (ISSCC, 2015)

4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications. - Seongwook Park; Kyeongryeol Bong; Dongjoo Shin; Jinmook Lee; Sungpill Choi; Hoi-Jun Yoo (ISSCC, 2015)

A 0.5-degree error 10mW CMOS image sensor-based gaze estimation processor with logarithmic processing. - Kyeongryeol Bong; Injoon Hong; Gyeonghoon Kim; Hoi-Jun Yoo (VLSIC, 2015)

A 4.84mW 30fps dual frequency division multiplexing electrical impedance tomography SoC for lung ventilation monitoring system. - Yongsu Lee; Kiseok Song; Hoi-Jun Yoo (VLSIC, 2015)

A 33 nJ/vector descriptor generation processor for low-power object recognition. - Dongjoo Shin; Injoon Hong; Gyeonghoon Kim; Hoi-Jun Yoo (VLSIC, 2015)

A 45 µW Injection-Locked FSK Wake-Up Receiver With Frequency-to-Envelope Conversion for Crystal-Less Wireless Body Area Network. - Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A 5.2 mW IEEE 802.15.6 HBC Standard Compatible Transceiver With Power Efficient Delay-Locked-Loop Based BPSK Demodulator. - Hyunwoo Cho; Hyungwoo Lee; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A 27 mW Reconfigurable Marker-Less Logarithmic Camera Pose Estimation Engine for Mobile Augmented Reality Processor. - Injoon Hong; Gyeonghoon Kim; Youchang Kim; Donghyun Kim; Byeong-Gyu Nam; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A 10.4 mW Electrical Impedance Tomography SoC for Portable Real-Time Lung Ventilation Monitoring System. - Sunjoo Hong; Jaehyuk Lee; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A 4.9 mΩ-Sensitivity Mobile Electrical Impedance Tomography IC for Early Breast-Cancer Detection System. - Sunjoo Hong; Kwonjoon Lee; Unsoo Ha; Hyunki Kim; Yongsu Lee; Youchang Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A 1.22 TOPS and 1.52 mW/MHz Augmented Reality Multicore Processor With Neural Network NoC for HMD Applications. - Gyeonghoon Kim; Kyuho Lee 001; Youchang Kim; Seongwook Park; Injoon Hong; Kyeongryeol Bong; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A Vocabulary Forest Object Matching Processor With 2.07 M-Vector/s Throughput and 13.3 nJ/Vector Per-Vector Energy for Full-HD 60 fps Video Object Recognition. - Kyuho Jason Lee; Gyeonghoon Kim; Junyoung Park 002; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

An Impedance and Multi-Wavelength Near-Infrared Spectroscopy IC for Non-Invasive Blood Glucose Estimation. - Kiseok Song; Unsoo Ha; Seongwook Park; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2015)

A Wearable EEG-HEG-HRV Multimodal System With Simultaneous Monitoring of tES for Mental Health Management. - Unsoo Ha; Yongsu Lee; Hyunki Kim; Taehwan Roh; Joonsung Bae; Changhyeon Kim; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2015)

An Energy-Efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications. - Seongwook Park; Junyoung Park 002; Kyeongryeol Bong; Dongjoo Shin; Jinmook Lee; Sungpill Choi; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2015)

A 34pJ/level pixel depth-estimation processor with shifter-based pipelined architecture for mobile user interface. - Sungpill Choi; Seongwook Park; Hoi-Jun Yoo (A-SSCC, 2016)

An EEG-NIRS ear-module SoC for wearable drowsiness monitoring system. - Unsoo Ha; Hoi-Jun Yoo (A-SSCC, 2016)

A multimodal drowsiness monitoring ear-module system with closed-loop real-time alarm. - Unsoo Ha; Hoi-Jun Yoo (BioCAS, 2016)

A 1.1 mW 32-thread artificial intelligence processor with 3-level transposition table and on-chip PVT compensation for autonomous mobile robots. - Youchang Kim; Dongjoo Shin; Jinsu Lee; Hoi-Jun Yoo (COOL Chips, 2016)

An energy-efficient parallel multi-core ADAS processor with robust visual attention and workload-prediction DVFS for real-time HD stereo stream. - Kyuho Lee 001; Kyeongryeol Bong; Changhyeon Kim; Junyoung Park 002; Hoi-Jun Yoo (COOL Chips, 2016)

Sticker-type ECG/PPG concurrent monitoring system hybrid integration of CMOS SoC and organic sensor device. - Yongsu Lee; Hyeonwoo Lee; Seunghyup Yoo; Hoi-Jun Yoo (EMBC, 2016)

A fabric wrist patch sensor for continuous and comprehensive monitoring of the cardiovascular system. - Kwonjoon Lee; Kiseok Song; Taehwan Roh; Hoi-Jun Yoo (EMBC, 2016)

A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC. - Minseo Kim; Unsoo Ha; Yongsu Lee; Kyuho Lee 001; Hoi-Jun Yoo (ESSCIRC, 2016)

An 8.3mW 1.6Msamples/s multi-modal event-driven speech enhancement processor for robust speech recognition in smart glasses. - Jinmook Lee; Seongwook Park; Injoon Hong; Hoi-Jun Yoo (ESSCIRC, 2016)

An intelligent ADAS processor with real-time semi-global matching and intention prediction for 720p stereo vision. - Kyuho Jason Lee; Kyeongryeol Bong; Changhyeon Kim; Hoi-Jun Yoo (Hot Chips Symposium, 2016)

A 43.7 mW 94 fps CMOS image sensor-based stereo matching accelerator with focal-plane rectification and analog census transformation. - Changhyeon Kim; Kyeongryeol Bong; Sungpill Choi; Hoi-Jun Yoo (ISCAS, 2016)

A 54-μW fast-settling arterial pulse wave sensor for wrist watch type system. - Kwantae Kim; Minseo Kim; Hyunwoo Cho; Kwonjoon Lee; Seung-Tak Ryu; Hoi-Jun Yoo (ISCAS, 2016)

30-fps SNR equalized electrical impedance tomography IC with fast-settle filter and adaptive current control for lung monitoring. - Jaehyuk Lee; Unsoo Ha; Hoi-Jun Yoo (ISCAS, 2016)

A 635 μW non-contact compensation IC for body channel communication. - Kyoung-Rog Lee; Jaeeun Jang; Hyunwoo Cho; Hoi-Jun Yoo (ISCAS, 2016)

A 48 μW, 8.88 × 10-3 W/W batteryless energy harvesting BCC identification system. - Jihee Lee; Yongsu Lee; Hyunwoo Cho; Hoi-Jun Yoo (ISCAS, 2016)

14.3 A 0.55V 1.1mW artificial-intelligence processor with PVT compensation for micro robots. - Youchang Kim; Dongjoo Shin; Jinsu Lee; Yongsu Lee; Hoi-Jun Yoo (ISSCC, 2016)

14.2 A 502GOPS and 0.984mW dual-mode ADAS SoC with RNN-FIS engine for intention prediction in automotive black-box system. - Kyuho Jason Lee; Kyeongryeol Bong; Changhyeon Kim; Jaeeun Jang; Hyunki Kim; Jihee Lee; Kyoung-Rog Lee; Gyeonghoon Kim; Hoi-Jun Yoo (ISSCC, 2016)

22.3 A 141µW sensor SoC on OLED/OPD substrate for SpO2/ExG monitoring sticker. - Yongsu Lee; Hyeonwoo Lee; Jaeeun Jang; Jihee Lee; Minseo Kim; Jaehyuk Lee; Hyunki Kim; Kyoung-Rog Lee; Kwantae Kim; Hyunwoo Cho; Seunghyup Yoo; Hoi-Jun Yoo (ISSCC, 2016)

14.1 A 126.1mW real-time natural UI/UX processor with embedded deep-learning core for low-power smart glasses. - Seongwook Park; Sungpill Choi; Jinmook Lee; Minseo Kim; Junyoung Park 002; Hoi-Jun Yoo (ISSCC, 2016)

Low-power real-time intelligent SoCs for smart machines. - Youchang Kim; Injoon Hong; Seongwook Park; Hoi-Jun Yoo (SoCC, 2016)

A 0.5° Error 10 mW CMOS Image Sensor-Based Gaze Estimation Processor. - Kyeongryeol Bong; Injoon Hong; Gyeonghoon Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2016)

A 79 pJ/b 80 Mb/s Full-Duplex Transceiver and a 42.5µW 100 kb/s Super-Regenerative Transceiver for Body Channel Communication. - Hyunwoo Cho; Hyunki Kim; Minseo Kim; Jaeeun Jang; Yongsu Lee; Kyuho Jason Lee; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2016)

A 2.71 nJ/Pixel Gaze-Activated Object Recognition System for Low-Power Mobile Smart Glasses. - Injoon Hong; Kyeongryeol Bong; Dongjoo Shin; Seongwook Park; Kyuho Jason Lee; Youchang Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2016)

An Energy-Efficient Embedded Deep Neural Network Processor for High Speed Visual Attention in Mobile Vision Recognition SoC. - Seongwook Park; Injoon Hong; Junyoung Park 002; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2016)

The effects of electrode impedance on receiver sensitivity in body channel communication. - Joonsung Bae; Hoi-Jun Yoo (Microelectron. J., 2016)

A 540-µW Duty Controlled RSSI With Current Reusing Technique for Human Body Communication. - Jaeeun Jang; Yongsu Lee; Hyunwoo Cho; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2016)

A Fault-Tolerant Cache System of Automotive Vision Processor Complying With ISO26262. - Jinho Han; Youngsu Kwon; Kyeongjin Byun; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A CMOS Image Sensor-Based Stereo Matching Accelerator With Focal-Plane Sparse Rectification and Analog Census Transform. - Changhyeon Kim; Kyeongryeol Bong; Sungpill Choi; Kyuho Jason Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

A 0.5 V 54 µW Ultra-Low-Power Object Matching Processor for Micro Air Vehicle Navigation. - Youchang Kim; Injoon Hong; Junyoung Park 002; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

A 1GHz fault tolerant processor with dynamic lockstep and self-recovering cache for ADAS SoC complying with ISO26262 in automotive electronics. - Jinho Han; Youngsu Kwon; Yong Cheol Peter Cho; Hoi-Jun Yoo (A-SSCC, 2017)

A 2.79-mW 0.5%-THD CMOS current driver IC for portable electrical impedance tomography system. - Jaeeun Jang; Minseo Kim; Joonsung Bae; Hoi-Jun Yoo (A-SSCC, 2017)

A 21mW low-power recurrent neural network accelerator with quantization tables for embedded deep learning applications. - Jinmook Lee; Dongjoo Shin; Hoi-Jun Yoo (A-SSCC, 2017)

A multimodal headpatch system for patient brain monitoring in OR and PACU. - Unsoo Ha; Hoi-Jun Yoo; Joonsung Bae (BioCAS, 2017)

Wearable 3D lung ventilation monitoring system with multi frequency electrical impedance tomography. - Minseo Kim; Joonsung Bae; Hoi-Jun Yoo (BioCAS, 2017)

An energy-efficient deep learning processor with heterogeneous multi-core architecture for convolutional neural networks and recurrent neural networks. - Dongjoo Shin; Jinmook Lee; Jinsu Lee; Juhyoung Lee; Hoi-Jun Yoo (COOL Chips, 2017)

An adaptive DC-balanced and multi-mode stimulator IC with 1GΩ output impedance for compact electro-acupuncture system. - Jiwon Lee; Minseo Kim; Kwantae Kim; Kiseok Song; Sanghoon Lee; Weon Kim; Jong Shin Woo; Hoi-Jun Yoo (EMBC, 2017)

A 274µW clock synchronized wireless body area network IC with super-regenerative RSSI for biomedical ad-hoc network system. - Yongsu Lee; Hoi-Jun Yoo (EMBC, 2017)

An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications. - Changhyeon Kim; Kyeongryeol Bong; Injoon Hong; Kyuho Lee 001; Sungpill Choi; Hoi-Jun Yoo (ESSCIRC, 2017)

A 24 μW 38.51 mΩrms resolution bio-impedance sensor with dual path instrumentation amplifier. - Kwantae Kim; Kiseok Song; Kyeongryeol Bong; Jaehyuk Lee; Kwonjoon Lee; Yongsu Lee; Unsoo Ha; Hoi-Jun Yoo (ESSCIRC, 2017)

A Real-Time and Energy-Efficient Embedded System for Intelligent ADAS with RNN-Based Deep Risk Prediction using Stereo Camera. - Kyuho Lee 001; Gyeongmin Choe; Kyeongryeol Bong; Changhyeon Kim; In So Kweon; Hoi-Jun Yoo (ICVS, 2017)

A 0.53mW ultra-low-power 3D face frontalization processor for face recognition with human-level accuracy in wearable devices. - Sanghoon Kang; Jinmook Lee; Kyeongryeol Bong; Changhyeon Kim; Hoi-Jun Yoo (ISCAS, 2017)

14.6 A 0.62mW ultra-low-power convolutional-neural-network face-recognition processor and a CIS integrated with always-on haar-like face detector. - Kyeongryeol Bong; Sungpill Choi; Changhyeon Kim; Sanghoon Kang; Youchang Kim; Hoi-Jun Yoo (ISSCC, 2017)

27.2 A 25.2mW EEG-NIRS multimodal SoC for accurate anesthesia depth monitoring. - Unsoo Ha; Jaehyuk Lee; Jihee Lee; Kwantae Kim; Minseo Kim; Taehwan Roh; Sangsik Choi; Hoi-Jun Yoo (ISSCC, 2017)

21.2 A 1.4mΩ-sensitivity 94dB-dynamic-range electrical impedance tomography SoC and 48-channel Hub SoC for 3D lung ventilation monitoring system. - Minseo Kim; Hyunki Kim; Jaeeun Jang; Jihee Lee; Jaehyuk Lee; Jiwon Lee; Kyungrog Lee; Kwantae Kim; Yongsu Lee; Hoi-Jun Yoo (ISSCC, 2017)

14.2 DNPU: An 8.1TOPS/W reconfigurable CNN-RNN processor for general-purpose deep neural networks. - Dongjoo Shin; Jinmook Lee; Jinsu Lee; Hoi-Jun Yoo (ISSCC, 2017)

A 590MDE/s semi-global matching processor with lossless data compression. - Kyeongryeol Bong; Kyuho Lee 001; Hoi-Jun Yoo (SoCC, 2017)

A 1.41mW on-chip/off-chip hybrid transposition table for low-power robust deep tree search in artificial intelligence SoCs. - Dongjoo Shin; Youchang Kim; Hoi-Jun Yoo (SoCC, 2017)

Sticker-Type Hybrid Photoplethysmogram Monitoring System Integrating CMOS IC With Organic Optical Sensors. - Yongsu Lee; Hyeonwoo Lee; Jaeeun Jang; Jihee Lee; Minseo Kim; Jaehyuk Lee; Hyunki Kim; Seunghyup Yoo; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2017)

A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC. - Minseo Kim; Unsoo Ha; Kyuho Jason Lee; Yongsu Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2017)

A 1.4-m $ Omega$ -Sensitivity 94-dB Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub-SoC for 3-D Lung Ventilation Monitoring System. - Minseo Kim; Jaeeun Jang; Hyunki Kim; Jihee Lee; Jaehyuk Lee; Jiwon Lee; Kyoung-Rog Lee; Kwantae Kim; Yongsu Lee; Kyuho Jason Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2017)

A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System. - Kyuho Jason Lee; Kyeongryeol Bong; Changhyeon Kim; Jaeeun Jang; Kyoung-Rog Lee; Jihee Lee; Gyeonghoon Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2017)

Low-Power Convolutional Neural Network Processor for a Face-Recognition System. - Kyeongryeol Bong; Sungpill Choi; Changhyeon Kim; Hoi-Jun Yoo (IEEE Micro, 2017)

BRAIN: A Low-Power Deep Search Engine for Autonomous Robots. - Youchang Kim; Dongjoo Shin; Jinsu Lee; Hoi-Jun Yoo (IEEE Micro, 2017)

An Energy-Efficient Speech-Extraction Processor for Robust User Speech Recognition in Mobile Head-Mounted Display Systems. - Jinmook Lee; Seongwook Park; Injoon Hong; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A 17.5-fJ/bit Energy-Efficient Analog SRAM for Mixed-Signal Processing. - Jinsu Lee; Dongjoo Shin; Youchang Kim; Hoi-Jun Yoo (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Capsule Endoscope System for Wide Visualization Field and Location Tracking. - Jaeeun Jang; Hoi-Jun Yoo (BioCAS, 2018)

Advances and Open Challenges for Integrated Circuits Detecting Bio-Molecules. - Marco Carminati; Roland Thewes; Jacob K. Rosenstein; Hoi-Jun Yoo (ICECS, 2018)

A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices. - Donghyeon Han; Jinsu Lee; Jinmook Lee; Sungpill Choi; Hoi-Jun Yoo (ISCAS, 2018)

A 46.1 fps Global Matching Optical Flow Estimation Processor for Action Recognition in Mobile Devices. - Juhyoung Lee; Changhyeon Kim; Sungpill Choi; Dongjoo Shin; Sanghoon Kang; Hoi-Jun Yoo (ISCAS, 2018)

A 0.78 mW Low-Power 4.02 High-Compression Ratio Less than 10-6 BER Error-Tolerant Lossless Image Compression Hardware for Wireless Capsule Endoscopy System. - Jiwon Lee; Kyoung-Rog Lee; Hoi-Jun Yoo (ISCAS, 2018)

A 9.02mW CNN-stereo-based real-time 3D hand-gesture recognition processor for smart mobile devices. - Sungpill Choi; Jinsu Lee; Kyuho Lee 001; Hoi-Jun Yoo (ISSCC, 2018)

4-Camera VGA-resolution capsule endoscope with 80Mb/s body-channel communication transceiver and Sub-cm range capsule localization. - Jaeeun Jang; Jihee Lee; Kyoung-Rog Lee; Jiwon Lee; Minseo Kim; Yongsu Lee; Joonsung Bae; Hoi-Jun Yoo (ISSCC, 2018)

UNPU: A 50.6TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision. - Jinmook Lee; Changhyeon Kim; Sanghoon Kang; Dongjoo Shin; Sangyeob Kim; Hoi-Jun Yoo (ISSCC, 2018)

Mobile/embedded DNN and AI SoCs. - Hoi-Jun Yoo (VLSI-DAT, 2018)

B-Face: 0.2 MW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification. - Sanghoon Kang; Jinmook Lee; Changhyeon Kim; Hoi-Jun Yoo (VLSI Circuits, 2018)

A 0.8V 82.9µW In-Ear BCI Controller System with 8.8 PEF EEG Instrumentational Amplifier and Wireless BAN Transceiver. - Jaehyuk Lee; Kyoung-Rog Lee; Unsoo Ha; Ji-Hoon Kim 004; Kwonjoon Lee; Hoi-Jun Yoo (VLSI Circuits, 2018)

Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices. - Sanghoon Kang; Jinmook Lee; Kyeongryeol Bong; Changhyeon Kim; Youchang Kim; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector. - Kyeongryeol Bong; Sungpill Choi; Changhyeon Kim; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2018)

An EEG-NIRS Multimodal SoC for Accurate Anesthesia Depth Monitoring. - Unsoo Ha; Jaehyuk Lee; Minseo Kim; Taehwan Roh; Sangsik Choi; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2018)

DNPU: An Energy-Efficient Deep-Learning Processor with Heterogeneous Multi-Core Architecture. - Dongjoo Shin; Jinmook Lee; Jinsu Lee; Juhyoung Lee; Hoi-Jun Yoo (IEEE Micro, 2018)

Guest Editorial Special Issue on Advances and Open Challenges for Integrated Circuits Detecting Bio Molecules. - Marco Carminati; Jacob K. Rosenstein; Roland Thewes; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2018)

A 0.55 V 1.1 mW Artificial Intelligence Processor With On-Chip PVT Compensation for Autonomous Mobile Robots. - Youchang Kim; Dongjoo Shin; Jinsu Lee; Yongsu Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture. - Sungpill Choi; Kyeongryeol Bong; Donghyeon Han; Hoi-Jun Yoo (AICAS, 2019)

A battery-less 31 µW HBC receiver with RF energy harvester for implantable devices. - Jihee Lee; Jaeeun Jang; Jaehyuk Lee; Hoi-Jun Yoo (A-SSCC, 2019)

An 802.15.6 HBC Standard Compatible Transceiver and 90 pJ/b Full-Duplex Transceiver for Body Channel Communication. - Jaeeun Jang; Hyunwoo Cho; Hoi-Jun Yoo (BioCAS, 2019)

Analysis of Channel Characteristic for Body Channel Communication Transceiver Design. - Jaeeun Jang; Hoi-Jun Yoo (BODYNETS, 2019)

Understanding Body Channel Communication : A review: from history to the future applications. - Jaeeun Jang; Joonsung Bae; Hoi-Jun Yoo (CICC, 2019)

Mobile Deep Learning Processors on the Edge. - Hoi-Jun Yoo (CICC, 2019)

Direct Feedback Alignment Based Convolutional Neural Network Training for Low-Power Online Learning Processor. - Donghyeon Han; Hoi-Jun Yoo (ICCV Workshops, 2019)

93.8% Current Efficiency and 0.672 ns Transient Response Reconfigurable LDO for Wireless Sensor Network Systems. - Surin Gweon; Jaehyuk Lee; Kwantae Kim; Hoi-Jun Yoo (ISCAS, 2019)

DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-Time Image Segmentation on Mobile Devices. - Dongseok Im; Donghyeon Han; Sungpill Choi; Sanghoon Kang; Hoi-Jun Yoo (ISCAS, 2019)

An Ultra-Low-Power Analog-Digital Hybrid CNN Face Recognition Processor Integrated with a CIS for Always-on Mobile Devices. - Ji-Hoon Kim 004; Changhyeon Kim; Kwantae Kim; Hoi-Jun Yoo (ISCAS, 2019)

A 15.2 TOPS/W CNN Accelerator with Similar Feature Skipping for Face Recognition in Mobile Devices. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Jinsu Lee; Hoi-Jun Yoo (ISCAS, 2019)

A 0.5V 9.26μW 15.28mΩ/√Hz Bio-Impedance Sensor IC With 0.55° Overall Phase Error. - Kwantae Kim; Ji-Hoon Kim 004; Surin Gweon; Jiwon Lee; Minseo Kim; Yongsu Lee; Soyeon Kim; Hoi-Jun Yoo (ISSCC, 2019)

A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience Compression. - Changhyeon Kim; Sanghoon Kang; Dongjoo Shin; Sungpill Choi; Youngwoo Kim; Hoi-Jun Yoo (ISSCC, 2019)

A 7.0fps Optical and Electrical Dual Tomographic Imaging SoC for Skin-Disease Diagnosis System. - Yongsu Lee; Kwantae Kim; Jiwon Lee; Kyoung-Rog Lee; Surin Gweon; Minseo Kim; Hoi-Jun Yoo (ISSCC, 2019)

A 5.37mW/Channel Pitch-Matched Ultrasound ASIC with Dynamic-Bit-Shared SAR ADC and 13.2V Charge-Recycling TX in Standard CMOS for Intracardiac Echocardiography. - Jihee Lee; Kyoung-Rog Lee; Benjamin E. Eovino; Jeong Hoan Park; Liwei Lin; Hoi-Jun Yoo; Jerald Yoo (ISSCC, 2019)

LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16. - Jinsu Lee; Juhyoung Lee; Donghyeon Han; Jinmook Lee; Gwangtae Park; Hoi-Jun Yoo (ISSCC, 2019)

Intelligence on Silicon: From Deep-Neural-Network Accelerators to Brain Mimicking AI-SoCs. - Hoi-Jun Yoo (ISSCC, 2019)

A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture. - Donghyeon Han; Jinsu Lee; Jinmook Lee; Hoi-Jun Yoo (VLSI Circuits, 2019)

A Full HD 60 fps CNN Super Resolution Processor with Selective Caching based Layer Fusion for Mobile Devices. - Juhyoung Lee; Dongjoo Shin; Jinsu Lee; Jinmook Lee; Sanghoon Kang; Hoi-Jun Yoo (VLSI Circuits, 2019)

Efficient Convolutional Neural Network Training with Direct Feedback Alignment. - Donghyeon Han; Hoi-Jun Yoo (CoRR, 2019)

Custom Sub-Systems and Circuits for Deep Learning: Guest Editorial Overview. - Chia-Yu Chen; Boris Murmann; Jae-sun Seo; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices. - Sungpill Choi; Kyeongryeol Bong; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

A Four-Camera VGA-Resolution Capsule Endoscope System With 80-Mb/s Body Channel Communication Transceiver and Sub-Centimeter Range Capsule Localization. - Jaeeun Jang; Jihee Lee; Kyoung-Rog Lee; Jiwon Lee; Minseo Kim; Yongsu Lee; Joonsung Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2019)

UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision. - Jinmook Lee; Changhyeon Kim; Sanghoon Kang; Dongjoo Shin; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2019)

A 0.8-V 82.9- $ mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver. - Jaehyuk Lee; Kyoung-Rog Lee; Unsoo Ha; Ji-Hoon Kim 004; Kwonjoon Lee; Surin Gweon; Jaeeun Jang; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2019)

A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application. - Donghyeon Han; Jinsu Lee; Jinmook Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 9.6 mW/Ch 10 MHz Wide-bandwidth Electrical Impedance Tomography IC with Accurate Phase Compensation for Breast Cancer Detection. - Jaehyuk Lee; Surin Gweon; Kwonjoon Lee; Soyeon Um; Kyoung-Rog Lee; Kwantae Kim; Jihee Lee; Hoi-Jun Yoo (CICC, 2020)

Deep Learning Processors for On-Device Intelligence. - Hoi-Jun Yoo (ACM Great Lakes Symposium on VLSI, 2020)

A 54.7 fps 3D Point Cloud Semantic Segmentation Processor with Sparse Grouping Based Dilated Graph Convolutional Network for Mobile Devices. - Sangjin Kim; Sangyeob Kim; Juhyoung Lee; Hoi-Jun Yoo (ISCAS, 2020)

7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation. - Sanghoon Kang; Donghyeon Han; Juhyoung Lee; Dongseok Im; Sangyeob Kim; Soyeon Kim; Hoi-Jun Yoo (ISSCC, 2020)

A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices. - Dongseok Im; Sanghoon Kang; Donghyeon Han; Sungpill Choi; Hoi-Jun Yoo (VLSI Circuits, 2020)

A 0.5V, 6.2μW, 0.059mm2 Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing. - Kwantae Kim; Changhyeon Kim; Sungpill Choi; Hoi-Jun Yoo (VLSI Circuits, 2020)

A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Jinmook Lee; Hoi-Jun Yoo (VLSI Circuits, 2020)

Z-PIM: An Energy-Efficient Sparsity Aware Processing-In-Memory Architecture with Fully-Variable Weight Precision. - Ji-Hoon Kim 004; Juhyoung Lee; Jinsu Lee; Hoi-Jun Yoo; Joo-Young Kim 001 (VLSI Circuits, 2020)

Extension of Direct Feedback Alignment to Convolutional and Recurrent Neural Network for Bio-plausible Deep Learning. - Donghyeon Han; Gwangtae Park; Junha Ryu; Hoi-Jun Yoo (CoRR, 2020)

SRNPU: An Energy-Efficient CNN-Based Super-Resolution Processor With Tile-Based Selective Super-Resolution in Mobile Devices. - Juhyoung Lee; Jinsu Lee; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2020)

Wireless Body-Area-Network Transceiver and Low-Power Receiver With High Application Expandability. - Jaeeun Jang; Jihee Lee; Hyunwoo Cho; Jaehyuk Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2020)

A 0.5-V Sub-10-μW 15.28-mΩ/√Hz Bio-Impedance Sensor IC With Sub-1° Phase Error. - Kwantae Kim; Ji-Hoon Kim 004; Surin Gweon; Minseo Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2020)

The Heterogeneous Deep Neural Network Processor With a Non-von Neumann Architecture. - Dongjoo Shin; Hoi-Jun Yoo (Proc. IEEE, 2020)

DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation. - Dongseok Im; Donghyeon Han; Sungpill Choi; Sanghoon Kang; Hoi-Jun Yoo (IEEE Trans. Circuits Syst., 2020)

A 0.22-0.89 mW Low-Power and Highly-Secure Always-On Face Recognition Processor With Adversarial Attack Prevention. - Youngwoo Kim; Donghyeon Han; Changhyeon Kim; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Power-Efficient CNN Accelerator With Similar Feature Skipping for Face Recognition in Mobile Devices. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Jinsu Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020)

The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices. - Jinsu Lee; Sanghoon Kang; Jinmook Lee; Dongjoo Shin; Donghyeon Han; Hoi-Jun Yoo (IEEE Trans. Circuits Syst., 2020)

The Development of Silicon for AI: Different Design Approaches. - Kyuho Jason Lee; Jinmook Lee; Sungpill Choi; Hoi-Jun Yoo (IEEE Trans. Circuits Syst., 2020)

A 1.15 TOPS/W Energy-Efficient Capsule Network Accelerator for Real-Time 3D Point Cloud Segmentation in Mobile Environment. - Gwangtae Park; Dongseok Im; Donghyeon Han; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems. - Juhyoung Lee; Changhyeon Kim; Donghyeon Han; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (AICAS, 2021)

FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling. - Surin Gweon; Sanghoon Kang; Donghyeon Han; Kyoung-Rog Lee; Kwantae Kim; Hoi-Jun Yoo (A-SSCC, 2021)

An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training. - Wooyoung Jo; Juhyoung Lee; Seunghyun Park; Hoi-Jun Yoo (A-SSCC, 2021)

An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation. - Donghyeon Han; Dongseok Im; Gwangtae Park; Youngwoo Kim; Seokchan Song; Juhyoung Lee; Hoi-Jun Yoo (COOL CHIPS, 2021)

PNNPU: A Fast and Efficient 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. - Sangjin Kim; Juhyoung Lee; Dongseok Im; Hoi-Jun Yoo (HCS, 2021)

An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. - Juhyoung Lee; Jihoon Kim 004; Wooyoung Jo; Sangyeob Kim; Sangjin Kim; Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo (HCS, 2021)

OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data. - Juhyoung Lee; Sangyeob Kim; Ji-Hoon Kim 004; Sangjin Kim; Wooyoung Jo; Donghyeon Han; Hoi-Jun Yoo (HCS, 2021)

A 3.6 TOPS/W Hybrid FP-FXP Deep Learning Processor with Outlier Compensation for Image-to-Image Application. - Zhiyong Li 016; Dongseok Im; Jinsu Lee; Hoi-Jun Yoo (ISCAS, 2021)

PNNPU: A 11.9 TOPS/W High-speed 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. - Sangjin Kim; Juhyoung Lee; Dongseok Im; Hoi-Jun Yoo (VLSI Circuits, 2021)

A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. - Juhyoung Lee; Jihoon Kim 004; Wooyoung Jo; Sangyeob Kim; Sangjin Kim; Jinsu Lee; Hoi-Jun Yoo (VLSI Circuits, 2021)

OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dualmode Weight Compression and On-chip Sparse Weight Transposer. - Juhyoung Lee; Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo (VLSI Circuits, 2021)

GST: Group-Sparse Training for Accelerating Deep Reinforcement Learning. - Juhyoung Lee; Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Hoi-Jun Yoo (CoRR, 2021)

An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence With Software-Hardware Cross-Layer Optimizations. - Sanghoon Kang; Gwangtae Park; Sangjin Kim; Soyeon Kim; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching. - Donghyeon Han; Dongseok Im; Gwangtae Park; Youngwoo Kim; Seokchan Song; Juhyoung Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning. - Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation. - Sanghoon Kang; Donghyeon Han; Juhyoung Lee; Dongseok Im; Sangyeob Kim; Soyeon Kim; Junha Ryu; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

An Energy-Efficient GAN Accelerator With On-Chip Training for Domain-Specific Optimization. - Soyeon Kim; Sanghoon Kang; Donghyeon Han; Sangjin Kim; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection. - Jaehyuk Lee; Surin Gweon; Kwonjoon Lee; Soyeon Um; Kyoung-Rog Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2021)

A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System. - Jihee Lee; Kyoung-Rog Lee; Benjamin E. Eovino; Jeong Hoan Park; Luna Yue Liang; Liwei Lin; Hoi-Jun Yoo; Jerald Yoo (IEEE J. Solid State Circuits, 2021)

Simultaneous Electrical Bio-Impedance Plethysmography at Different Body Parts: Continuous and Non-Invasive Monitoring of Pulse Wave Velocity. - Kwonjoon Lee; Hoi-Jun Yoo (IEEE Trans. Biomed. Circuits Syst., 2021)

A 64.1mW Accurate Real-Time Visual Object Tracking Processor With Spatial Early Stopping on Siamese Network. - Soyeon Kim; Sangjin Kim; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 0.82 μW CIS-Based Action Recognition SoC With Self-Adjustable Frame Resolution for Always-on IoT Devices. - Junha Ryu; Gwangtae Park; Dongseok Im; Ji-Hoon Kim 004; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse. - Soyeon Um; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation. - Donghyeon Han; Dongseok Im; Gwangtae Park; Youngwoo Kim; Seokchan Song; Juhyoung Lee; Hoi-Jun Yoo (AICAS, 2022)

A DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation. - Donghyeon Han; Dongseok Im; Gwangtae Park; Youngwoo Kim; Seokchan Song; Juhyoung Lee; Hoi-Jun Yoo (AICAS, 2022)

Low-power Autonomous Adaptation System with Deep Reinforcement Learning. - Juhyoung Lee; Wooyoung Jo; Seong-Wook Park; Hoi-Jun Yoo (AICAS, 2022)

An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache. - Zhiyong Li 016; Sangjin Kim; Dongseok Im; Donghyeon Han; Hoi-Jun Yoo (CICC, 2022)

A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms. - Dongseok Im; Gwangtae Park; Junha Ryu; Zhiyong Li 016; Sanghoon Kang; Donghyeon Han; Jinsu Lee; Wonhoon Park; Hankyul Kwon; Hoi-Jun Yoo (COOL CHIPS, 2022)

HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Mobile Devices. - Donghyeon Han; Dongseok Im; Gwangtae Park; Youngwoo Kim; Seokchan Song; Juhyoung Lee; Hoi-Jun Yoo (HCS, 2022)

DSPU: A 281.6mW Real-Time Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip. - Dongseok Im; Gwangtae Park; Zhiyong Li 016; Junha Ryu; Sanghoon Kang; Donghyeon Han; Jinsu Lee; Wonhoon Park; Hankyul Kwon; Hoi-Jun Yoo (HCS, 2022)

Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Kwantae Kim; Hoi-Jun Yoo (HCS, 2022)

An Efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache. - Zhiyong Li 016; Sangjin Kim; Dongseok Im; Donghyeon Han; Hoi-Jun Yoo (HCS, 2022)

A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks. - Wooyoung Jo; Sangjin Kim; Juhyeong Lee; Soyeon Um; Zhiyong Li 016; Hoi-Jun Yoo (ISCAS, 2022)

DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms. - Dongseok Im; Gwangtae Park; Zhiyong Li 016; Junha Ryu; Sanghoon Kang; Donghyeon Han; Jinsu Lee; Hoi-Jun Yoo (ISSCC, 2022)

A 23μW Solar-Powered Keyword-Spotting ASIC with Ring-Oscillator-Based Time-Domain Feature Extraction. - Kwantae Kim; Chang Gao 002; Rui Graça; Ilya Kiselev; Hoi-Jun Yoo; Tobi Delbruck; Shih-Chii Liu (ISSCC, 2022)

Energy-efficient Dense DNN Acceleration with Signed Bit-slice Architecture. - Dongseok Im; Gwangtae Park; Zhiyong Li 016; Junha Ryu; Hoi-Jun Yoo (CoRR, 2022)

FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems. - Surin Gweon; Sanghoon Kang; Kwantae Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2022)

A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction. - Dongseok Im; Donghyeon Han; Sanghoon Kang; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2022)

A 23-μW Keyword Spotting IC With Ring-Oscillator-Based Time-Domain Feature Extraction. - Kwantae Kim; Chang Gao 002; Rui Graça; Ilya Kiselev; Hoi-Jun Yoo; Tobi Delbruck; Shih-Chii Liu (IEEE J. Solid State Circuits, 2022)

Design of Sub-10-μW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing. - Kwantae Kim; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2022)

OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor With Dual-Mode Weight Compression and Sparse Weight Transposer. - Juhyoung Lee; Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Ji-Hoon Kim 004; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2022)

A Mobile DNN Training Processor With Automatic Bit Precision Search and Fine-Grained Sparsity Exploitation. - Donghyeon Han; Dongseok Im; Gwangtae Park; Youngwoo Kim; Seokchan Song; Juhyoung Lee; Hoi-Jun Yoo (IEEE Micro, 2022)

ECIM: Exponent Computing in Memory for an Energy-Efficient Heterogeneous Floating-Point DNN Training Processor. - Juhyoung Lee; Jihoon Kim 004; Wooyoung Jo; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (IEEE Micro, 2022)

A Low-Power Graph Convolutional Network Processor With Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices. - Sangjin Kim; Sangyeob Kim; Juhyoung Lee; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning. - Sangyeob Kim; Juhyoung Lee; Sanghoon Kang; Donghyeon Han; Wooyoung Jo; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array. - Sangwoo Ha; Sangjin Kim; Donghyeon Han; Soyeon Um; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 49.5 mW Multi-Scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection. - Seokchan Song; Soyeon Kim; Gwangtae Park; Donghyeon Han; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Resource-Efficient Super-Resolution FPGA Processor with Heterogeneous CNN and SNN Core Architecture. - Jiwon Choi; Sangyeob Kim; Wonhoon Park; Wooyoung Jo; Hoi-Jun Yoo (A-SSCC, 2023)

An Energy-Efficient Heterogeneous Fourier Transform-Based Transformer Accelerator with Frequency-Wise Dynamic Bit-Precision. - Jingu Lee; Sangjin Kim; Wooyoung Jo; Hoi-Jun Yoo (A-SSCC, 2023)

A 33.6 FPS Embedding based Real-time Neural Rendering Accelerator with Switchable Computation Skipping Architecture on Edge Device. - Jongjun Park; Donghyeon Han; Junha Ryu; Dongseok Im; Gwangtae Park; Hoi-Jun Yoo (A-SSCC, 2023)

LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell. - Soyeon Um; Sangjin Kim; Seongyon Hong; Sangyeob Kim; Hoi-Jun Yoo (A-SSCC, 2023)

A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Jongjun Park; Hoi-Jun Yoo (COOL CHIPS, 2023)

COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Donghyeon Han; Jiwon Choi; Hoi-Jun Yoo (COOL CHIPS, 2023)

A 3.8 mW 1.9 m Ω/√Hz Electrical Impedance Tomography Imaging with 28.4 M Ω High Input Impedance and Loading Calibration. - Soyeon Um; Jaehyuk Lee; Hoi-Jun Yoo (ESSCIRC, 2023)

Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation. - Dongseok Im; Gwangtae Park; Zhiyong Li 016; Junha Ryu; Hoi-Jun Yoo (HPCA, 2023)

A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC. - Seongyon Hong; Soyeon Um; Sangjin Kim; Sangyeob Kim; Wooyoung Jo; Hoi-Jun Yoo (ISCAS, 2023)

A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency. - Seryeong Kim; Soyeon Kim; Soyeon Um; Sangjin Kim; Zhiyong Li 016; Sangyeob Kim; Wooyoung Jo; Hoi-Jun Yoo (ISCAS, 2023)

A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System. - Hankyul Kwon; Gwangtae Park; Junha Ryu; Wooyoung Jo; Hoi-Jun Yoo (ISCAS, 2023)

A 5.99 TFLOPS/W Heterogeneous CIM-NPU Architecture for an Energy Efficient Floating-Point DNN Acceleration. - Wonhoon Park; Junha Ryu; Sangjin Kim; Soyeon Um; Wooyoung Jo; Sangyoeb Kim; Hoi-Jun Yoo (ISCAS, 2023)

MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile Devices. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Hoi-Jun Yoo (ISSCC, 2023)

C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity Generation. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Donghyeon Han; Hoi-Jun Yoo (ISSCC, 2023)

DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching. - Sangjin Kim; Zhiyong Li 016; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Juhyoung Lee; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo (ISSCC, 2023)

NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices. - Wooyoung Jo; Sangjin Kim; Juhyoung Lee; Donghyeon Han; Sangyeob Kim; Seungyoon Choi; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation. - Sangjin Kim; Soyeon Um; Wooyoung Jo; Jingu Lee; Sangwoo Ha; Zhiyong Li 016; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation. - Seokchan Song; Donghyeon Han; Sangjin Kim; Sangyeob Kim; Gwangtae Park; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

A 709.3 TOPS/W Event-Driven Smart Vision SoC with High-Linearity and Reconfigurable MRAM PIM. - Wenao Xie; Haoyang Sang; Beomseok Kwon; Dongseok Im; Sangjin Kim; Sangyeob Kim; Hoi-Jun Yoo (VLSI Technology and Circuits, 2023)

DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC. - Dongseok Im; Gwangtae Park; Junha Ryu; Zhiyong Li 016; Sanghoon Kang; Donghyeon Han; Jinsu Lee; Wonhoon Park; Hankyul Kwon; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2023)

A Mobile 3-D Object Recognition Processor With Deep-Learning-Based Monocular Depth Estimation. - Dongseok Im; Gwangtae Park; Zhiyong Li 016; Junha Ryu; Sanghoon Kang; Donghyeon Han; Jinsu Lee; Wonhoon Park; Hankyul Kwon; Hoi-Jun Yoo (IEEE Micro, 2023)

An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache. - Zhiyong Li 016; Sangjin Kim; Dongseok Im; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2023)

Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Kwantae Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2023)

SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Juhyoung Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2023)

C-DNN V2: Complementary Deep-Neural-Network Processor With Full-Adder/OR-Based Reduction Tree and Reconfigurable Spatial Weight Reuse. - Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

DualNet: Efficient Integration of Artificial Neural Network and Spiking Neural Network with Equivalent Conversion. - Seongyon Hong; Sangyeob Kim; Soyeon Kim; Hoi-Jun Yoo (AICAS, 2024)

EnTADRL: Deep Reinforcement Learning System-on-Chip for End-to-End Training Acceleration. - Jingu Lee; Sanghyuk An; Jongjun Park; Jiwon Choi; Haoyang Sang; Sangwoo Ha; Sangjin Kim; Hoi-Jun Yoo (A-SSCC, 2024)

A 66.6 FPS High Quality Gaussian Splats Rendering FPGA Processor with Reconfigurable Computation Architecture. - Hongseok Lee; Gwangtae Park; Wonhoon Park; Wooyoung Jo; Jongjun Park; Hoi-Jun Yoo (A-SSCC, 2024)

Review of Non-invasive, Wearable Biomedical Sensor and Imaging IC. - Jaeeun Jang; Hoi-Jun Yoo (BioCAS, 2024)

NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator. - Sangjin Kim; Zhiyong Li 016; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Sangyeob Kim; Hoi-Jun Yoo (COOL CHIPS, 2024)

A Low-power and Real-time Neural-Rendering Dense SLAM Processor with 3-Level Hierarchical Sparsity Exploitation. - Gwangtae Park; Seokchan Song; Haoyang Sang; Dongseok Im; Donghyeon Han; Sangyeob Kim; Hongseok Lee; Hoi-Jun Yoo (COOL CHIPS, 2024)

A Low-Power Neural Graphics System for Instant 3D Modeling and Real-Time Rendering on Mobile AR/VR Devices. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Minsung Kim; Hoi-Jun Yoo (COOL CHIPS, 2024)

A Low-Power Large-Language-Model Processor with Big-Little Network and Implicit-Weight-Generation for On-Device AI. - Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Soyeon Kim; Seongyon Hong; Nayeong Lee; Hoi-Jun Yoo (HCS, 2024)

NeuGPU: A Neural Graphics Processing Unit for Instant Modeling and Real-Time Rendering on Mobile AR/VR Devices. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Minsung Kim; Hoi-Jun Yoo (HCS, 2024)

Space-Mate: A 303.5mW Real-Time NeRF SLAM Processor with Sparse-Mixture-of-Experts-based Acceleration. - Seokchan Song; Haoyang Sang; Dongseok Im; Donghyeon Han; Sangyeob Kim; Hongseok Lee; Hoi-Jun Yoo (HCS, 2024)

LUTein: Dense-Sparse Bit-Slice Architecture With Radix-4 LUT-Based Slice-Tensor Processing Units. - Dongseok Im; Hoi-Jun Yoo (HPCA, 2024)

A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision. - Jiwon Choi; Wooyoung Jo; Seongyon Hong; Beomseok Kwon; Wonhoon Park; Hoi-Jun Yoo (ISCAS, 2024)

Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. - Sangyeob Kim; Sangjin Kim; Soyeon Um; Soyeon Kim; Hoi-Jun Yoo (ISCAS, 2024)

A 3.55 mJ/frame Energy-efficient Mixed-Transformer based Semantic Segmentation Accelerator for Mobile Devices. - Jongjun Park; Seryeong Kim; Wonhoon Park; Seokchan Song; Hoi-Jun Yoo (ISCAS, 2024)

Opportunities and Challenges of DRAM-based Computing-in-Memory for AI Accelerator. - Sangjin Kim; Hoi-Jun Yoo (ISOCC, 2024)

A Software-Hardware Co-Optimized Sense Amplifier for 2T1C Cell-based DRAM In-Memory-Computing. - Sunjoo Whang; Soyeon Um; Sangwoo Ha; Hoi-Jun Yoo (ISOCC, 2024)

20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models. - Sangyeob Kim; Sangjin Kim; Wooyoung Jo; Soyeon Kim; Seongyon Hong; Hoi-Jun Yoo (ISSCC, 2024)

20.8 Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing. - Gwangtae Park; Seokchan Song; Haoyang Sang; Dongseok Im; Donghyeon Han; Sangyeob Kim; Hongseok Lee; Hoi-Jun Yoo (ISSCC, 2024)

20.7 NeuGPU: A 18.5mJ/Iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time Rendering with Segmented-Hashing Architecture. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Hoi-Jun Yoo (ISSCC, 2024)

CamPU: A Multi-Camera Processing Unit for Deep Learning-based 3D Spatial Computing Systems. - Dongseok Im; Hoi-Jun Yoo (MICRO, 2024)

Dyamond: A 1T1C DRAM In-memory Computing Accelerator with Compact MAC-SIMD and Adaptive Column Addition Dataflow. - Seongyon Hong; Wooyoung Jo; Sangjin Kim; Sangyeob Kim; Kyomin Sohn; Hoi-Jun Yoo (VLSI Technology and Circuits, 2024)

NeRF-Navi: A 93.6-202.9µJ/task Switchable Approximate-Accurate NeRF Path Planning Processor with Dual Attention Engine and Outlier Bit-Offloading Core. - Seryeong Kim; Seokchan Song; Wonhoon Park; Junha Ryu; Sangyeob Kim; Gwangtae Park; Soyeon Kim; Hoi-Jun Yoo (VLSI Technology and Circuits, 2024)

A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Jongjun Park; Hoi-Jun Yoo (IEEE Micro, 2024)

COOL-NPU: Complementary Online Learning Neural Processing Unit. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Jiwon Choi; Donghyeon Han; Hoi-Jun Yoo (IEEE Micro, 2024)

MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing. - Donghyeon Han; Junha Ryu; Sangyeob Kim; Sangjin Kim; Jongjun Park; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. - Sangyeob Kim; Soyeon Kim; Seongyon Hong; Sangjin Kim; Donghyeon Han; Jiwon Choi; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell. - Sangjin Kim; Zhiyong Li 016; Soyeon Um; Wooyoung Jo; Sangwoo Ha; Juhyoung Lee; Sangyeob Kim; Donghyeon Han; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

An Overview of Computing-in-Memory Circuits With DRAM and NVM. - Sangjin Kim; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator With Delta-Based Weight Sharing and Block-Mantissa Reconfigurable PE Array. - Sanghyuk An; Junha Ryu; Gwangtae Park; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC With Switchable nvSRAM Compute-in-Memory Macro. - Haoyang Sang; Wenao Xie; Gwangtae Park; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 92 fps and 2.56 mJ/Frame Computing-In-Memory-Based Human Pose Estimation Accelerator With Resource-Efficient Macro for Mobile Devices. - Beomseok Kwon; Zhiyong Li 016; Sangjin Kim; Wooyoung Jo; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 3.8-mW 1.9-mΩ/√Hz Electrical Impedance Tomography IC With High Input Impedance and Loading Effect Calibration for 3-D Early Breast Cancer Detect System. - Soyeon Um; Jaehyuk Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation. - Sangjin Kim; Soyeon Um; Wooyoung Jo; Jingu Lee; Sangwoo Ha; Zhiyong Li 016; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor With Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell. - Soyeon Um; Sangjin Kim; Seongyon Hong; Sangyeob Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2024)

An Energy-Efficient CNN/Transformer Hybrid Neural Semantic Segmentation Processor With Chunk-Based Bit Plane Data Compression and Similarity-Based Token-Level Skipping Exploitation. - Jongjun Park; Seryeong Kim; Wonhoon Park; Seokchan Song; Hoi-Jun Yoo (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 51.2 fps Real-Time 3DGS-SLAM Accelerator using Diagonal Feeding with Symmetric Alpha Reuse and Voxel-based 3D Gaussian Cache Management. - Hyungnam Joo; Seryeong Kim; Jongjun Park; Junha Ryu; Hoi-Jun Yoo (ISCAS, 2025)

A 4.21 TFLOPS/W Memory-Efficient LLM Inference Accelerator with Bit-Layered Non-Uniform Quantization. - Byeongcheol Kim; Sangjin Kim; Sangwoo Ha; Soyeon Um; Kyomin Sohn; Hoi-Jun Yoo (ISCAS, 2025)

A 13.8 TOPS/W Polynomial Implicit Neural Representation Accelerator with Tile Similarity Exploitation and LUT-based Matrix Multiplication Reformation. - Minsung Kim; Wonhoon Park; Sanghyuk An; Hoi-Jun Yoo; Donghyeon Han (ISCAS, 2025)

A 32.65µm2 Spin/Area Large Scale Ising CIM with Progressive Circular Dataflow and Bi-directional eDRAM Cell Array. - Jingu Lee; Sangwoo Ha; Sunjoo Whang; Soyeon Kim; Sangjin Kim; Soyeon Um; Wooyoung Jo; Hoi-Jun Yoo (ISCAS, 2025)

A 65.1 TOPS/W Digital CIM Processor for Ultra-Low-Bit Transformers with Multiplexer-based Adder and Scaling Factor-based Reordering. - Nayeong Lee; Sangyeob Kim; Seongyon Hong; Jiwon Choi; Hoi-Jun Yoo (ISCAS, 2025)

A Real-time 4.31 mJ/Frame Neural-3DGS Processor with Voxel Similarity Memory Management and Opacity-based Sparsity Generation. - Hongseok Lee; Wonhoon Park; Sanghyuk An; Junha Ryu; Hoi-Jun Yoo (ISCAS, 2025)

A 2.67 mJ/frame Video Mamba Accelerator with Importance-aware Redundancy Elimination and SSM Computing Reformulation. - Youngjin Moon; Sangwoo Ha; Soyeon Kim; Junha Ryu; Hoi-Jun Yoo; Donghyeon Han (ISCAS, 2025)

A 9.6 TOPS/W Vision Transformer Processor with Hierarchical Token Merging for Similarity-Driven Difference Computing. - Jungjun Oh; Sangjin Kim; Jiwon Choi; Byeongcheol Kim; Hoi-Jun Yoo (ISCAS, 2025)

A 17.1 TOPS/W FP-INT Transformer Inference Accelerator with Sparsity Boosting and Output Importance-Aware Processing. - Jeonggyu So; Seongyon Hong; Jiwon Choi; Wooyoung Jo; Sangjin Kim; Hoi-Jun Yoo; Donghyeon Han (ISCAS, 2025)

A 62.8 TOPS/W FP-INT Digital Computing-in Memory Processor with Bit-Reordered Adder Tree and Low Active Hierarchical Accumulator. - Sunjoo Whang; Sangwoo Ha; Soyeon Um; Sangjin Kim; Hoi-Jun Yoo (ISCAS, 2025)

23.7 BROCA: A 52.4-to-559.2mW Mobile Social Agent System-on-Chip with Adaptive Bit-Truncate Unit and Acoustic-Cluster Bit Grouping. - Wooyoung Jo; Seongyon Hong; Jiwon Choi; Beomseok Kwon; Haoyang Sang; Dongseok Im; Sangyeob Kim; Sangjin Kim; Taekwon Lee; Hoi-Jun Yoo (ISSCC, 2025)

Slim-Llama: A 4.69mW Large-Language-Model Processor with Binary/Ternary Weights for Billion-Parameter Llama Model. - Sangyeob Kim; Jungwan Lee; Hoi-Jun Yoo (ISSCC, 2025)

23.3 EdgeDiff: 418.4mJ/Inference Multi-Modal Few-Step Diffusion Model Accelerator with Mixed-Precision and Reordered Group Quantization. - Sangjin Kim; Jungjun Oh; Jeonggyu So; Yuseon Choi; Sangyeob Kim; Dongseok Im; Gwangtae Park; Hoi-Jun Yoo (ISSCC, 2025)

IRIS: A 8.55mJ/frame Spatial Computing SoC for Interactable Rendering and Surface-Aware Modeling with 3D Gaussian Splatting. - Seokchan Song; Seryeong Kim; Wonhoon Park; Jongjun Park; Sanghyuk An; Gwangtae Park; Minseo Kim; Hoi-Jun Yoo (ISSCC, 2025)

NeuGPU: An Energy-Efficient Neural Graphics Processing Unit for Instant Modeling and Real-Time Rendering on Mobile Devices. - Junha Ryu; Hankyul Kwon; Wonhoon Park; Zhiyong Li 016; Beomseok Kwon; Donghyeon Han; Dongseok Im; Sangyeob Kim; Hyungnam Joo; Minsung Kim; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2025)

Dyamond: Compact and Efficient 1T1C DRAM IMC Accelerator With Bit Column Addition for Memory-Intensive AI. - Seongyon Hong; Wooyoung Jo; Sangjin Kim; Sangyeob Kim; Soyeon Um; Kyomin Sohn; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2025)

LightRot: A Light-Weighted Rotation Scheme and Architecture for Accurate Low-Bit Large Language Model Inference. - Sangjin Kim; Yuseon Choi; Jungjun Oh; Byeongcheol Kim; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)

An Overview of Neural Rendering Accelerators: Challenges, Trends, and Future Directions. - Junha Ryu; Hoi-Jun Yoo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)

ED-MPIM: An Energy-Efficient Event-Driven Smart Vision SoC With High-Linearity and Reconfigurable MRAM PIM. - Wenao Xie; Haoyang Sang; Beomseok Kwon; Dongseok Im; Sangjin Kim; Sangyeob Kim; Kangho Lee; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2025)