A 2Gb/s/pin 512Mb Graphics DRAM with NoiseReduction Techniques. - Martin Brox; H. Fibranz; Maksim Kuzmenka; F. Lu; S. Mann; M. Markert; U. Möller; Manfred Plan; Kai Schiller; P. Schmölz; P. Schrögmeier; A. Täuber; et al. (ISSCC, 2006)

75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques. - Rex Kho; David Boursin; Martin Brox; Peter Gregorius; Heinz Hoenigschmid; Bianka Kho; Sabine Kieser; Daniel Kehrer; Maksim Kuzmenka; Udo Moeller; Pavel Veselinov Petkov; Manfred Plan; et al. (ISSCC, 2009)

A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques. - Rex Kho; David Boursin; Martin Brox; Peter Gregorius; Heinz Hoenigschmid; Bianka Kho; Sabine Kieser; Daniel Kehrer; Maksim Kuzmenka; Udo Moeller; Pavel Veselinov Petkov; Manfred Plan; et al. (IEEE J. Solid State Circuits, 2010)