Counterpropagation network and time-frequency shift-tolerant preprocessing for phoneme recognition. - Li-Minn Ang; Hon Nin Cheung (ICNN, 1995)

An Efficient Aopproach to Constrained Via Minimization for Two-Layer VLSI Routing. - Maolin Tang; Kamran Eshraghian; Hon Nin Cheung (ASP-DAC, 1999)

VLSI decoder architecture for embedded zerotree wavelet algorithm. - Li-Minn Ang; Hon Nin Cheung; Kamran Eshraghian (ISCAS (1), 1999)

EZW algorithm using depth-first representation of the wavelet zerotree. - Li-Minn Ang; Hon Nin Cheung; Kamran Eshraghian (ISSPA, 1999)

Robust image compression using the depth-first search on the wavelet zerotree. - Li-Minn Ang; Hon Nin Cheung; Kamran Eshraghian (ISSPA, 1999)

Smart pixel VLSI architecture for embedded zerotree wavelet coding. - Hon Nin Cheung; Geoff Alagoda; Kamran Eshraghian; Li-Minn Ang (ISSPA, 1999)

Parallel Architecture for the Implementation of the Embedded Zerotree Wavelet Algorithm. - Hon Nin Cheung; Li-Minn Ang; Kamran Eshraghian (ACAC, 2000)

A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing. - Li-Minn Ang; Hon Nin Cheung; Kamran Eshraghian (ISCAS, 2000)

Hardware implementation of the depth first search bit stream SPIHT system. - Li-Minn Ang; Hon Nin Cheung (ISCAS (4), 2001)