SAR: A Self-Adaptive and Reliable protocol for wireless multimedia sensor networks. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (ICUFN, 2015)

Parallel pipelining configurable multi-port memory controller for multimedia applications. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (ISCAS, 2015)

Low-resource low-latency hybrid adaptive CORDIC with floating-point precision. - Hong-Thu Nguyen; Xuan-Thuan Nguyen; Trong-Thuc Hoang; Duc-Hung Le; Cong-Kha Pham (IEICE Electron. Express, 2015)

A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (ICICDT, 2016)

A hybrid adaptive CORDIC in 65nm SOTB CMOS process. - Trong-Thuc Hoang; Duc-Hung Le; Hong-Thu Nguyen; Xuan-Thuan Nguyen; Cong-Kha Pham (ISCAS, 2016)

An efficient FPGA-based database processor for fast database analytics. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Trong-Thuc Hoang; Katsumi Inoue; Osamu Shimojo; Toshio Murayama; Kenji Tominaga; Cong-Kha Pham (ISCAS, 2016)

An FPGA approach for fast bitmap indexing. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (IEICE Electron. Express, 2016)

An FPGA approach for high-performance multi-match priority encoder. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (IEICE Electron. Express, 2016)

Highly parallel bitmap-based regular expression matching for text analytics. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Katsumi Inoue; Osamu Shimojo; Cong-Kha Pham (ISCAS, 2017)

FPGA-based frequent items counting using matrix of equality comparators. - Trong-Thuc Hoang; Xuan-Thuan Nguyen; Hong-Thu Nguyen; Nhu-Quynh Truong; Duc-Hung Le; Katsumi Inoue; Cong-Kha Pham (MWSCAS, 2017)

A Low-Latency Parallel Pipeline CORDIC. - Hong-Thu Nguyen; Xuan-Thuan Nguyen; Cong-Kha Pham (IEICE Trans. Electron., 2017)

A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion. - Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

An efficient fixed-point arithmetic processor using a hybrid CORDIC algorithm. - Hong-Thu Nguyen; Xuan-Thuan Nguyen; Cong-Kha Pham (ASP-DAC, 2018)

A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS. - Xuan-Thuan Nguyen; Trong-Thuc Hoang; Hong-Thu Nguyen; Katsumi Inoue; Cong-Kha Pham (ISCAS, 2018)

VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study. - Katsumi Inoue; Trong-Thuc Hoang; Xuan-Thuan Nguyen; Hong-Thu Nguyen; Cong-Kha Pham (PRIME, 2018)

An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation. - Xuan-Thuan Nguyen; Trong-Thuc Hoang; Hong-Thu Nguyen; Katsumi Inoue; Cong-Kha Pham (IEEE Access, 2018)

A CORDIC-based QR decomposition for MIMO signal detector. - Hong-Thu Nguyen; Xuan-Thuan Nguyen; Trong-Thuc Hoang; Cong-Kha Pham (IEICE Electron. Express, 2018)

A High-Throughput Low-Energy Arithmetic Processor. - Hong-Thu Nguyen; Xuan-Thuan Nguyen; Cong-Kha Pham (IEICE Trans. Electron., 2018)

A Low-Power Hybrid Adaptive CORDIC. - Hong-Thu Nguyen; Xuan-Thuan Nguyen; Cong-Kha Pham (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB. - Xuan-Thuan Nguyen; Trong-Thuc Hoang; Hong-Thu Nguyen; Katsumi Inoue; Cong-Kha Pham (Microprocess. Microsystems, 2019)

An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA. - Xuan-Thuan Nguyen; Trong-Thuc Hoang; Hong-Thu Nguyen; Katsumi Inoue; Cong-Kha Pham (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A 0.9-V 50-MHz 256-bit 1D-to-2D-based single/multi-match priority encoder with 0.67-nW standby power on 65-nm SOTB CMOS. - Xuan-Thuan Nguyen; Trong-Thuc Hoang; Hong-Thu Nguyen; Katsumi Inoue; Cong-Kha Pham (Microprocess. Microsystems, 2020)