Sparse Matrix-Vector Multiplication Based on Network-on-Chip in FPGA. - Chi-Chia Sun; Jürgen Götze; Hong-Yuan Jheng; Shanq-Jang Ruan (CIT, 2010)

FPGA acceleration of Sparse Matrix-Vector Multiplication based on Network-on-Chip. - Hong-Yuan Jheng; C. C. Sun; Shanq-Jang Ruan; Jürgen Götze (EUSIPCO, 2011)

An error-correction scheme with Reed-Solomon codec for CAN bus transmission. - I-An Chen; Chang-Hsin Cheng; Hong-Yuan Jheng; Chung-Kai Liu; Fan-Chieh Cheng; Shanq-Jang Ruan; Chang-Hong Lin (ISPACS, 2011)

FPGA implementation of high sampling rate in-car non-stationary noise cancellation based on adaptive Wiener filter. - Hong-Yuan Jheng; Yen-Hsiang Chen; Shanq-Jang Ruan; Ziming Qi (VLSI-SoC, 2011)

Energy-Efficient IDCT Design for DS-CDMA Watermarking Systems. - Shan-Chun Kuo; Hong-Yuan Jheng; Fan-Chieh Cheng; Shanq-Jang Ruan (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)