Hongbo Zhang

Affiliations:
  • Facebook, Inc., Menlo Park, USA
  • Synopsys, Inc., Mountain View, CA, USA (former)
  • University of Illinois at Urbana Champaign, USA (PhD 2012)


According to our database1, Hongbo Zhang authored at least 29 papers between 2009 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning and DSA Lithography.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2018
On coloring rectangular and diagonal grid graphs for multiple patterning lithography.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2016
Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Accelerating aerial image simulation using improved CPU/GPU collaborative computing.
Comput. Electr. Eng., 2015

Contact pitch and location prediction for Directed Self-Assembly template verification.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

An efficient linear time triple patterning solver.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Triple patterning aware detailed placement with constrained pattern assignment.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Directed Self-Assembly (DSA) Template Pattern Verification.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
A Polynomial Time Exact Algorithm for Overlay-Resistant Self-Aligned Double Patterning (SADP) Layout Decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Efficient aerial image simulation on multi-core SIMD CPU.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Constrained pattern assignment for standard cell based triple patterning lithography.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Linear time algorithm to find all relocation positions for EUV defect mitigation.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Design-technology co-optimization in next generation lithography
PhD thesis, 2012

A Practical Low-Power Nonregular Interconnect Design With Manufacturing for Design Approach.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Impact of lithography retargeting process on low level interconnect in 20nm technology.
Proceedings of the International Workshop on System Level Interconnect Prediction, 2012

A polynomial time exact algorithm for self-aligned double patterning layout decomposition.
Proceedings of the International Symposium on Physical Design, 2012

Layout small-angle rotation and shift for EUV defect mitigation.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

A polynomial time triple patterning algorithm for cell based row-structure layout.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Triple patterning aware routing and its comparison with double patterning aware routing in 14nm technology.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Efficient pattern relocation for EUV blank defect mitigation.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Hybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
Thermal-Driven Analog Placement Considering Device Matching.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Lithography-aware layout modification considering performance impact.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Accelerating aerial image simulation with GPU.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Self-aligned double patterning decomposition for overlay minimization and hot spot detection.
Proceedings of the 48th Design Automation Conference, 2011

Mask cost reduction with circuit performance consideration for self-aligned double patterning.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
On process-aware 1-D standard cell design.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Wire shaping is practical.
Proceedings of the 2009 International Symposium on Physical Design, 2009


  Loading...