Novel high positive and negative pumping circuits for low supply voltage. - Hongchin Lin; Kai-Hsun Chang; Shyh-Chyi Wong (ISCAS (1), 1999)

A simple high-speed low current comparator. - Hongchin Lin; Jie-Hau Huang; Shyh-Chyi Wong (ISCAS, 2000)

New four-phase generation circuits for low-voltage charge pumps. - Hongchin Lin; Nai-Hsien Chen (ISCAS (1), 2001)

A low-power 3-phase half rail pass-gate differential logic. - Hongchin Lin; Yi-Fan Chen; Hsien-Chih She (ISCAS (4), 2001)

An 1 V rail-rail low-power CMOS op-amp. - Dingtzay Chen; Hongchin Lin (ISCAS (1), 2002)

Design of Modified Four-Phase CMOS Charge Pumps for Low-Voltage Flash Memories. - Hongchin Lin; Nai-Hsien Chen; Jainhao Lu (J. Circuits Syst. Comput., 2002)

A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems. - Hsin-Lei Lin; Robert Chen-Hao Chang; Chih-Hao Huang; Hongchin Lin (ISCAS (2), 2003)

A new dual pumping circuit without body effects for low supply voltage. - Ming-Chih Hsieh; Zheng-Hong Wang; Hongchin Lin; Yen-Tai Lin (ISCAS (2), 2004)

A sub-1V bandgap reference circuit using subthreshold current. - Hongchin Lin; Chao-Jui Liang (ISCAS (5), 2005)

A novel high-speed sense amplifier for Bi-NOR flash memories. - Chiu-Chiao Chung; Hongchin Lin; Yen-Tai Lin (IEEE J. Solid State Circuits, 2005)

A Simple Subthreshold CMOS Voltage Reference Circuit With Channel- Length Modulation Compensation. - Po-Hsuan Huang; Hongchin Lin; Yen-Tai Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A Multilevel Read and Verifying Scheme for Bi-NAND Flash Memories. - Chiu-Chiao Chung; Hongchin Lin; Yen-Tai Lin (IEEE J. Solid State Circuits, 2007)

Efficient high-throughput architectures for high-speed parallel scramblers. - Jianwei Chen; Hongchin Lin; Yun-Ching Tang (ISCAS, 2010)

A low-voltage band-gap reference circuit with second-order analyses. - Chao-Jui Liang; Chiu-Chiao Chung; Hongchin Lin (Int. J. Circuit Theory Appl., 2011)

An analysis of output ripples for PMOS charge pumps and design methodology. - Boy-Yiing Jaw; Hongchin Lin (APCCAS, 2012)

Area-efficient high-throughput parallel scramblers using generalized algorithms. - Yun-Ching Tang; Jianwei Chen; Hongchin Lin (IEICE Electron. Express, 2013)

Design of an Area-Efficient High-Throughput Shift-Based LDPC decoder. - Yun-Ching Tang; Hong-Ren Wang; Hongchin Lin; Jun-Zhe Huang (J. Circuits Syst. Comput., 2013)

High-voltage tolerant circuit design for fully CMOS compatible multiple-time programmable memories. - ChihYang Huang; Hongchin Lin; Chia-You Wu (ISCAS, 2014)

Energy-Efficient and Area-Efficient QC-LDPC with RS Decoders Using 2M-LMSA. - Chang-Kun Yao; Yun-Ching Tang; Hongchin Lin (J. Circuits Syst. Comput., 2015)

High-Performance Regulated Charge Pump with an Extended Range of Load Current. - Roger Yubtzuan Chen; Zong-Yi Yang; Hongchin Lin (IEICE Trans. Electron., 2016)

A Cost-Effective Hardware Architecture for ASCON Against DPA Attacks. - Chun-Yen Tsai; Hongchin Lin; Yeong-Kang Lai (ICCE, 2025)