A Pipelined Algorithm and Area-Efficient Architecture for Serial Real-Valued FFT. - Hongji Fang; Bo Zhang 097; Feng Yu 003; Bei Zhao; Zhenguo Ma (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Optimised Serial Commutator FFT Architecture in Terms of Multiplexers. - Hongji Fang; Zhenguo Ma; Feng Yu 003; Bei Zhao; Bo Zhang 097 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Pulse Compression Shape-Based ADC/DAC Chain Synchronization Measurement Algorithm with Sub-Sampling Resolution. - Xiangyu Hao; Hongji Fang; Wei Luo; Bo Zhang 097 (Sensors, 2024)

Area-Efficient Pipeline Architecture for Serial Real-Valued Fast Fourier Transform. - Kun Li 032; Hongji Fang; Zhenguo Ma; Feng Yu 003; Bo Zhang 097; Qianjian Xing (IEEE Trans. Very Large Scale Integr. Syst., 2025)

BuildingBRep-11K: Precise Multi-Storey B-Rep Building Solids with Rich Layout Metadata. - Yu Guo; Hongji Fang; Tianyu Fang; Zhe Cui (CoRR, 2025)