FPGA implementation of real-time image convolutions with three level of memory hierarchy. - Hongtu Jiang; Viktor Öwall (FPT, 2003)

FPGA implementation of controller-datapath pair in custom image processor design. - Hongtu Jiang; Viktor Öwall (ISCAS (5), 2004)

Hardware accelerator design for video segmentation with multi-modal background modelling. - Hongtu Jiang; Håkan Ardö; Viktor Öwall (ISCAS (2), 2005)

Real-Time Video Segmentation with VGA Resolution and Memory Bandwidth Reduction. - Hongtu Jiang; Viktor Öwall; Håkan Ardö (AVSS, 2006)

Design Issues in VLSI Implementation of Image Processing Hardware Accelerators - Methodology and Implementation. - Hongtu Jiang (2007)

An Embedded Real-Time Surveillance System: Implementation and Evaluation. - Fredrik Kristensen; Hugo Hedberg; Hongtu Jiang; Peter Nilsson 001; Viktor Öwall (J. Signal Process. Syst., 2008)

A Hardware Architecture for Real-Time Video Segmentation Utilizing Memory Reduction Techniques. - Hongtu Jiang; Håkan Ardö; Viktor Öwall (IEEE Trans. Circuits Syst. Video Technol., 2009)