A Deep-Reinforcement-Learning-Based Scheduler for High-Level Synthesis. - Hongzheng Chen; Minghua Shen (FPGA, 2019)

A Deep-Reinforcement-Learning-Based Scheduler for FPGA HLS. - Hongzheng Chen; Minghua Shen (ICCAD, 2019)

Entropy-Directed Scheduling for FPGA High-Level Synthesis. - Minghua Shen; Hongzheng Chen; Nong Xiao 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations. - Yichi Zhang 006; Junhao Pan; Xinheng Liu; Hongzheng Chen; Deming Chen; Zhiru Zhang (FPGA, 2021)

Krill: a compiler and runtime system for concurrent graph processing. - Hongzheng Chen; Minghua Shen; Nong Xiao 001; Yutong Lu (SC, 2021)

Accelerator design with decoupled hardware customizations: benefits and challenges: invited. - Debjit Pal; Yi-Hsiang Lai; Shaojie Xiang; Niansong Zhang; Hongzheng Chen; Jeremy Casas; Pasquale Cocchini; Zhenkun Yang; Jin Yang 006; Louis-Noël Pouchet; Zhiru Zhang (DAC, 2022)

HeteroFlow: An Accelerator Programming Model with Decoupled Data Placement for Software-Defined FPGAs. - Shaojie Xiang; Yi-Hsiang Lai; Yuan Zhou; Hongzheng Chen; Niansong Zhang; Debjit Pal; Zhiru Zhang (FPGA, 2022)

Structured Pruning is All You Need for Pruning CNNs at Initialization. - Yaohui Cai; Weizhe Hua; Hongzheng Chen; G. Edward Suh; Christopher De Sa; Zhiru Zhang (CoRR, 2022)

BGL: GPU-Efficient GNN Training by Optimizing Graph Data I/O and Preprocessing. - Tianfeng Liu; Yangrui Chen; Dan Li 001; Chuan Wu 001; Yibo Zhu; Jun He; Yanghua Peng; Hongzheng Chen; Hongzhi Chen; Chuanxiong Guo (NSDI, 2023)

Decoupled Model Schedule for Deep Learning Training. - Hongzheng Chen; Cody Hao Yu; Shuai Zheng 004; Zhen Zhang 063; Zhiru Zhang; Yida Wang 003 (CoRR, 2023)

Slapo: A Schedule Language for Progressive Optimization of Large Deep Learning Model Training. - Hongzheng Chen; Cody Hao Yu; Shuai Zheng 004; Zhen Zhang 063; Zhiru Zhang; Yida Wang 003 (ASPLOS (2), 2024)

A Comprehensive Evaluation of FPGA-Based Spatial Acceleration of LLMs. - Hongzheng Chen; Jiahao Zhang; Yixiao Du; Shaojie Xiang; Zichao Yue; Niansong Zhang; Yaohui Cai; Zhiru Zhang (FPGA, 2024)

Formal Verification of Source-to-Source Transformations for HLS. - Louis-Noël Pouchet; Emily Tucker; Niansong Zhang; Hongzheng Chen; Debjit Pal; Gabriel Rodríguez 001; Zhiru Zhang (FPGA, 2024)

Allo: A Programming Model for Composable Accelerator Design. - Hongzheng Chen; Niansong Zhang; Shaojie Xiang; Zhichen Zeng 002; Mengjia Dai; Zhiru Zhang (Proc. ACM Program. Lang., 2024)

ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines. - Jinming Zhuang; Shaojie Xiang; Hongzheng Chen; Niansong Zhang; Zhuoping Yang; Tony Mao; Zhiru Zhang; Peipei Zhou 001 (FPGA, 2025)

Understanding the Potential of FPGA-based Spatial Acceleration for Large Language Model Inference. - Hongzheng Chen; Jiahao Zhang; Yixiao Du; Shaojie Xiang; Zichao Yue; Niansong Zhang; Yaohui Cai; Zhiru Zhang (ACM Trans. Reconfigurable Technol. Syst., 2025)

HeuriGym: An Agentic Benchmark for LLM-Crafted Heuristics in Combinatorial Optimization. - Hongzheng Chen; Yingheng Wang; Yaohui Cai; Hins Hu; Jiajie Li; Shirley Huang; Chenhui Deng; Rongjian Liang; Shufeng Kong; Haoxing Ren; Samitha Samaranayake; Carla P. Gomes; et al. (CoRR, 2025)