Design of a Cycle-Accurate User-Retargetable Instruction-Set Simulator Using Process-Based Scheduling Scheme. - Hoonmo Yang; Moonkey Lee (CIS, 2004)

Embedded Processor Validation Environment Using a Cycle-Accurate Retargetable Instruction-Set Simulator. - Hoonmo Yang; Moonkey Lee (J. Supercomput., 2005)

Implementation of floating-point operations for 3D graphics on a coarse-grained reconfigurable architecture. - Manhwee Jo; V. K. Prasad Arava; Hoonmo Yang; Kiyoung Choi (SoCC, 2007)

Floating-point reconfiguration array processor for 3D graphics physics engine. - Hoonmo Yang (ASP-DAC, 2008)

Coarse-grained reconfigurable architecture for multiple application domains: a case study. - Manhwee Jo; Ganghee Lee; Kyungwook Chang; Kyuseung Han; Kiyoung Choi; Hoonmo Yang; Kiwook Yoon (ICHIT, 2009)