A reduced routing network architecture for partial parallel LDPC decoders. - Houshmand Shirani-mehr; Tinoosh Mohsenin; Bevan M. Baas (ACSCC, 2011)

Low power LDPC decoder with efficient stopping scheme for undecodable blocks. - Tinoosh Mohsenin; Houshmand Shirani-mehr; Bevan M. Baas (ISCAS, 2011)

LDPC Decoder with an Adaptive Wordwidth Datapath for Energy and BER Co-Optimization. - Tinoosh Mohsenin; Houshmand Shirani-mehr; Bevan M. Baas (VLSI Design, 2013)