Glitter: A Gridless Variable-Width Channel Router. - Howard H. Chen; Ernest S. Kuh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

Pseudo pin assignment for single-layer over-the-cell routing. - Howard H. Chen (ICCD, 1990)

Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design. - Howard H. Chen; David D. Ling (DAC, 1997)

Techniques for obtaining high performance in Java programs. - Iffat H. Kazi; Howard H. Chen; Berdenia Stanley; David J. Lilja (ACM Comput. Surv., 2000)

Integrated electro-thermomechanical analysis of nonuniformly chip-powered microelectronic system. - Tsorng-Dih Yuan; Bor Zen Hong; Howard H. Chen; Li-Kong Wang (Microelectron. Reliab., 2002)

On-Chip Decoupling Capacitor Optimization for Noise and Leakage Reduction. - Howard H. Chen; J. Scott Neely; Michael F. Wang; Gricel Co (SBCCI, 2003)

Modeling Temporal and Spatial Power Supply Voltage Variation for Timing Analysis. - Howard Chen 001; Daniel L. Ostapko (PATMOS, 2004)

Circuit Design Techniques for On-Chip Power Supply Noise Monitoring System. - Howard Chen 001; Louis Hsu (PATMOS, 2005)

Statistical Modeling and Analysis of Static Leakage and Dynamic Switching Power. - Howard Chen 001; Scott Neely; Jinjun Xiong; Vladimir Zolotov; Chandu Visweswariah (PATMOS, 2008)

Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction. - Yiyu Shi 001; Jinjun Xiong; Howard Chen 001; Lei He 001 (ASP-DAC, 2009)

Power Management and Its Impact on Power Supply Noise. - Howard Chen 001; Indira Nair (PATMOS, 2009)

Statistical Power Analysis for High-Performance Processors. - Howard Chen 001; Scott Neely; Jinjun Xiong; Vladimir Zolotov; Chandu Visweswariah (J. Low Power Electron., 2009)

The Effect of Dynamic Power Management on Mid-Frequency and Low-Frequency Power Supply Noise. - Howard Chen 001; Indira Nair; Benjamin Mashak (J. Low Power Electron., 2010)

Runtime Resonance Noise Reduction with Current Prediction Enabled Frequency Actuator. - Yiyu Shi 001; Jinjun Xiong; Howard Chen 001; Lei He 001 (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Design and Implementation of Block-Based Partitioning for Parallel Flip-Chip Power-Grid Analysis. - Chun-Jen Wei; Howard Chen 001; Sao-Jie Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)