Vector Processors for Energy-Efficient Embedded Systems. - Daniel Palmer Dabbelt; Colin Schmidt 001; Eric Love; Howard Mao; Sagar Karandikar; Krste Asanovic (MES@ISCA, 2016)

A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET. - Angie Wang; Brian C. Richards; Daniel Palmer Dabbelt; Howard Mao; Stevo Bailey; Jaeduk Han; Eric Chang; James Dunn 003; Elad Alon; Borivoje Nikolic (A-SSCC, 2017)

A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET. - Stevo Bailey; Jaeduk Han; Paul Rigge; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (A-SSCC, 2018)

FPGA Accelerated INDEL Realignment in the Cloud. - Lisa Wu 001; David Bruns-Smith; Frank A. Nothaft; Qijing Huang 001; Sagar Karandikar; Johnny Le; Andrew Lin; Howard Mao; Brendan Sweeney; Krste Asanovic; David A. Patterson 001; Anthony D. Joseph (HPCA, 2019)

Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. - Hasan Genc; Ameer Haj-Ali; Vighnesh Iyer; Alon Amid; Howard Mao; John Charles Wright; Colin Schmidt 001; Jerry Zhao; Albert J. Ou; Max Banister; Yakun Sophia Shao; Borivoje Nikolic; et al. (CoRR, 2019)

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. - Steven Bailey; Paul Rigge; Jaeduk Han; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (IEEE J. Solid State Circuits, 2019)

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. - Sagar Karandikar; Howard Mao; Donggyu Kim; David Biancolin; Alon Amid; Dayeol Lee; Nathan Pemberton; Emmanuel Amaro; Colin Schmidt 001; Aditya Chopra; Qijing Huang 001; Kyle Kovacs; et al. (IEEE Micro, 2019)

FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design. - Sagar Karandikar; Albert J. Ou; Alon Amid; Howard Mao; Randy H. Katz; Borivoje Nikolic; Krste Asanovic (ASPLOS, 2020)

Invited: Chipyard - An Integrated SoC Research and Implementation Environment. - Alon Amid; David Biancolin; Abraham Gonzalez; Daniel Grubb; Sagar Karandikar; Harrison Liew; Albert Magyar; Howard Mao; Albert J. Ou; Nathan Pemberton; Paul Rigge; Colin Schmidt 001; et al. (DAC, 2020)

Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. - Alon Amid; David Biancolin; Abraham Gonzalez; Daniel Grubb; Sagar Karandikar; Harrison Liew; Albert Magyar; Howard Mao; Albert J. Ou; Nathan Pemberton; Paul Rigge; Colin Schmidt 001; et al. (IEEE Micro, 2020)

Designing New Memory Systems for Next-Generation Data Centers - Howard Mao (2020)

Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. - Hasan Genc; Seah Kim; Alon Amid; Ameer Haj-Ali; Vighnesh Iyer; Pranav Prakash; Jerry Zhao; Daniel Grubb; Harrison Liew; Howard Mao; Albert J. Ou; Colin Schmidt 001; et al. (DAC, 2021)